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Commit 81d2c40c authored by Hsiang-Yu's avatar Hsiang-Yu
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Add all simulink models

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simulink_archive/simLink deleted 120000 → 0
View file @ 0b211de8
/opt/rtcds/rtscore/tags/advLigoRTS-2.8.8/src/epics/simLink
\ No newline at end of file
simulink_archive/simLink/CAL_LIB.mdl 0 → 100644
View file @ 81d2c40c
Library {
Name "CAL_LIB"
Version 8.5
MdlSubVersion 0
SavedCharacterEncoding "UTF-8"
LibraryType "BlockLibrary"
ScopeRefreshTime 0.035000
OverrideScopeRefreshTime off
DisableAllScopes off
FPTRunName "Run 1"
MaxMDLFileLineLength 120
Object {
$PropName "BdWindowsInfo"
$ObjectID 1
$ClassName "Simulink.BDWindowsInfo"
Object {
$PropName "WindowsInfo"
$ObjectID 2
$ClassName "Simulink.WindowInfo"
IsActive [1]
Location [463.0, 29.0, 1326.0, 1027.0]
Object {
$PropName "ModelBrowserInfo"
$ObjectID 3
$ClassName "Simulink.ModelBrowserInfo"
Visible [1]
DockPosition "Left"
Width [50]
Height [50]
Filter [9]
}
Object {
$PropName "ExplorerBarInfo"
$ObjectID 4
$ClassName "Simulink.ExplorerBarInfo"
Visible [0]
}
Object {
$PropName "EditorsInfo"
$ObjectID 5
$ClassName "Simulink.EditorInfo"
IsActive [1]
ViewObjType "SimulinkSubsys"
LoadSaveID "196"
Extents [1075.0, 881.0]
ZoomFactor [0.6]
Offset [99.4678410549227, -95.4166666666668]
}
}
}
Created "Mon Jan 26 14:37:40 2015"
Creator "maxime.fays"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "controls"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Fri Sep 08 15:45:49 2017"
RTWModifiedTimeStamp 426786339
ModelVersionFormat "1.%<AutoIncrement:114>"
ConfigurationManager "none"
SampleTimeColors off
SampleTimeAnnotations off
LibraryLinkDisplay "all"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowDesignRanges off
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
ShowTestPointIcons on
ShowSignalResolutionIcons on
ShowViewerIcons on
SortedOrder off
ExecutionContextIcon off
ShowLinearizationAnnotations on
ShowMarkup on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
SimulationMode "normal"
PauseTimes "5"
NumberOfSteps 1
SnapshotBufferSize 10
SnapshotInterval 10
NumberOfLastSnapshots 0
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
RecordCoverage off
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
CovForceBlockReductionOff on
CovEnableCumulative on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeReport off
CovReportOnPause on
CovModelRefEnable "Off"
CovExternalEMLEnable off
CovSFcnEnable on
CovBoundaryAbsTol 0.000010
CovBoundaryRelTol 0.010000
CovUseTimeInterval off
CovStartTime 0
CovStopTime 0
ExtModeBatchMode off
ExtModeEnableFloating on
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigDurationFloating "auto"
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
ShowModelReferenceBlockVersion off
ShowModelReferenceBlockIO off
Array {
Type "Handle"
Dimension 1
Simulink.ConfigSet {
$ObjectID 6
Version "1.15.0"
Array {
Type "Handle"
Dimension 8
Simulink.SolverCC {
$ObjectID 7
Version "1.15.0"
StartTime "0.0"
StopTime "10.0"
AbsTol "auto"
FixedStep "auto"
InitialStep "auto"
MaxNumMinSteps "-1"
MaxOrder 5
ZcThreshold "auto"
ConsecutiveZCsStepRelTol "10*128*eps"
MaxConsecutiveZCs "1000"
ExtrapolationOrder 4
NumberNewtonIterations 1
MaxStep "auto"
MinStep "auto"
MaxConsecutiveMinStep "1"
RelTol "1e-3"
SolverMode "Auto"
EnableConcurrentExecution off
ConcurrentTasks off
Solver "ode45"
SolverName "ode45"
SolverJacobianMethodControl "auto"
ShapePreserveControl "DisableAll"
ZeroCrossControl "UseLocalSettings"
ZeroCrossAlgorithm "Nonadaptive"
AlgebraicLoopSolver "TrustRegion"
SolverResetMethod "Fast"
PositivePriorityOrder off
AutoInsertRateTranBlk off
SampleTimeConstraint "Unconstrained"
InsertRTBMode "Whenever possible"
}
Simulink.DataIOCC {
$ObjectID 8
Version "1.15.0"
Decimation "1"
ExternalInput "[t, u]"
FinalStateName "xFinal"
InitialState "xInitial"
LimitDataPoints on
MaxDataPoints "1000"
LoadExternalInput off
LoadInitialState off
SaveFinalState off
SaveCompleteFinalSimState off
SaveFormat "Array"
SignalLoggingSaveFormat "Dataset"
SaveOutput on
SaveState off
SignalLogging on
DSMLogging on
InspectSignalLogs off
VisualizeSimOutput on
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName "xout"
TimeSaveName "tout"
OutputSaveName "yout"
SignalLoggingName "logsout"
DSMLoggingName "dsmout"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
ReturnWorkspaceOutputsName "out"
Refine "1"
}
Simulink.OptimizationCC {
$ObjectID 9
Version "1.15.0"
Array {
Type "Cell"
Dimension 8
Cell "BooleansAsBitfields"
Cell "PassReuseOutputArgsAs"
Cell "PassReuseOutputArgsThreshold"
Cell "ZeroExternalMemoryAtStartup"
Cell "ZeroInternalMemoryAtStartup"
Cell "OptimizeModelRefInitCode"
Cell "NoFixptDivByZeroProtection"
Cell "UseSpecifiedMinMax"
PropName "DisabledProps"
}
BlockReduction on
BooleanDataType on
ConditionallyExecuteInputs on
InlineParams off
UseDivisionForNetSlopeComputation "off"
UseFloatMulNetSlope off
DefaultUnderspecifiedDataType "double"
UseSpecifiedMinMax off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
EnhancedBackFolding off
CachingGlobalReferences off
GlobalBufferReuse on
StrengthReduction off
ExpressionFolding on
BooleansAsBitfields off
BitfieldContainerType "uint_T"
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs "Structure reference"
PassReuseOutputArgsThreshold 12
ExpressionDepthLimit 2147483647
LocalBlockOutputs on
RollThreshold 5
StateBitsets off
DataBitsets off
ActiveStateOutputEnumStorageType "Native Integer"
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero off
NoFixptDivByZeroProtection off
EfficientFloat2IntCast off
EfficientMapNaN2IntZero on
OptimizeModelRefInitCode off
LifeSpan "inf"
MaxStackSize "Inherit from target"
BufferReusableBoundary on
SimCompilerOptimization "off"
AccelVerboseBuild off
}
Simulink.DebuggingCC {
$ObjectID 10
Version "1.15.0"
RTPrefix "error"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
SignalInfNanChecking "none"
SignalRangeChecking "none"
ReadBeforeWriteMsg "UseLocalSettings"
WriteAfterWriteMsg "UseLocalSettings"
WriteAfterReadMsg "UseLocalSettings"
AlgebraicLoopMsg "warning"
ArtificialAlgebraicLoopMsg "warning"
SaveWithDisabledLinksMsg "warning"
SaveWithParameterizedLinksMsg "warning"
CheckSSInitialOutputMsg on
UnderspecifiedInitializationDetection "Classic"
MergeDetectMultiDrivingBlocksExec "none"
CheckExecutionContextPreStartOutputMsg off
CheckExecutionContextRuntimeOutputMsg off
SignalResolutionControl "UseLocalSettings"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
TimeAdjustmentMsg "none"
MaxConsecutiveZCsMsg "error"
MaskedZcDiagnostic "warning"
IgnoredZcDiagnostic "warning"
SolverPrmCheckMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskDSMMsg "error"
MultiTaskCondExecSysMsg "error"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
TasksWithSamePriorityMsg "warning"
SigSpecEnsureSampleTimeMsg "warning"
CheckMatrixSingularityMsg "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterUnderflowMsg "none"
ParameterPrecisionLossMsg "warning"
ParameterTunabilityLossMsg "warning"
FixptConstUnderflowMsg "none"
FixptConstOverflowMsg "none"
FixptConstPrecisionLossMsg "none"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
FcnCallInpInsideContextMsg "EnableAllAsError"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SFcnCompatibilityMsg "none"
FrameProcessingCompatibilityMsg "error"
UniqueDataStoreMsg "none"
BusObjectLabelMismatch "warning"
RootOutportRequireBusObject "warning"
AssertControl "UseLocalSettings"
ModelReferenceIOMsg "none"
ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"
ModelReferenceVersionMismatchMessage "none"
ModelReferenceIOMismatchMessage "none"
UnknownTsInhSupMsg "warning"
ModelReferenceDataLoggingMessage "warning"
ModelReferenceSymbolNameMessage "warning"
ModelReferenceExtraNoncontSigs "error"
StateNameClashWarn "warning"
SimStateInterfaceChecksumMismatchMsg "warning"
SimStateOlderReleaseMsg "error"
InitInArrayFormatMsg "warning"
StrictBusMsg "ErrorLevel1"
BusNameAdapt "WarnAndRepair"
NonBusSignalsTreatedAsBus "none"
BlockIODiagnostic "none"
SFUnusedDataAndEventsDiag "warning"
SFUnexpectedBacktrackingDiag "warning"
SFInvalidInputDataAccessInChartInitDiag "warning"
SFNoUnconditionalDefaultTransitionDiag "warning"
SFTransitionOutsideNaturalParentDiag "warning"
SFUnconditionalTransitionShadowingDiag "warning"
SFUndirectedBroadcastEventsDiag "warning"
SFTransitionActionBeforeConditionDiag "warning"
SFOutputUsedAsStateInMooreChartDiag "error"
IntegerSaturationMsg "warning"
}
Simulink.HardwareCC {
$ObjectID 11
Version "1.15.0"
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
ProdBitPerLongLong 64
ProdBitPerFloat 32
ProdBitPerDouble 64
ProdBitPerPointer 32
ProdLargestAtomicInteger "Char"
ProdLargestAtomicFloat "None"
ProdIntDivRoundTo "Undefined"
ProdEndianess "Unspecified"
ProdWordSize 32
ProdShiftRightIntArith on
ProdLongLongMode off
ProdHWDeviceType "32-bit Generic"
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
TargetBitPerLongLong 64
TargetBitPerFloat 32
TargetBitPerDouble 64
TargetBitPerPointer 32
TargetLargestAtomicInteger "Char"
TargetLargestAtomicFloat "None"
TargetShiftRightIntArith on
TargetLongLongMode off
TargetIntDivRoundTo "Undefined"
TargetEndianess "Unspecified"
TargetWordSize 32
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType "Specified"
TargetUnknown off
ProdEqTarget on
}
Simulink.ModelReferenceCC {
$ObjectID 12
Version "1.15.0"
UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
CheckModelReferenceTargetMessage "error"
EnableParallelModelReferenceBuilds off
ParallelModelReferenceErrorOnInvalidPool on
ParallelModelReferenceMATLABWorkerInit "None"
ModelReferenceNumInstancesAllowed "Multi"
PropagateVarSize "Infer from blocks in model"
ModelReferencePassRootInputsByReference on
ModelReferenceMinAlgLoopOccurrences off
PropagateSignalLabelsOutOfModel off
SupportModelReferenceSimTargetCustomCode off
}
Simulink.SFSimCC {
$ObjectID 13
Version "1.15.0"
SFSimOverflowDetection on
SFSimEcho on
SimCtrlC on
SimIntegrity on
SimUseLocalCustomCode off
SimParseCustomCode on
SimBuildMode "sf_incremental_build"
SimGenImportedTypeDefs off
}
Simulink.RTWCC {
$BackupClass "Simulink.RTWCC"
$ObjectID 14
Version "1.15.0"
Array {
Type "Cell"
Dimension 15
Cell "IncludeHyperlinkInReport"
Cell "GenerateTraceInfo"
Cell "GenerateTraceReport"
Cell "GenerateTraceReportSl"
Cell "GenerateTraceReportSf"
Cell "GenerateTraceReportEml"
Cell "PortableWordSizes"
Cell "GenerateWebview"
Cell "GenerateCodeMetricsReport"
Cell "GenerateCodeReplacementReport"
Cell "GenerateErtSFunction"
Cell "CreateSILPILBlock"
Cell "CodeExecutionProfiling"
Cell "CodeProfilingSaveOptions"
Cell "CodeProfilingInstrumentation"
PropName "DisabledProps"
}
SystemTargetFile "grt.tlc"
TLCOptions ""
GenCodeOnly off
MakeCommand "make_rtw"
GenerateMakefile on
PackageGeneratedCodeAndArtifacts off
PackageName ""
TemplateMakefile "grt_default_tmf"
PostCodeGenCommand ""
Description ""
GenerateReport off
SaveLog off
RTWVerbose on
RetainRTWFile off
ProfileTLC off
TLCDebug off
TLCCoverage off
TLCAssert off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
CustomSourceCode ""
CustomHeaderCode ""
CustomInclude ""
CustomSource ""
CustomLibrary ""
CustomInitializer ""
CustomTerminator ""
Toolchain "Automatically locate an installed toolchain"
BuildConfiguration "Faster Builds"
IncludeHyperlinkInReport off
LaunchReport off
PortableWordSizes off
CreateSILPILBlock "None"
CodeExecutionProfiling off
CodeExecutionProfileVariable "executionProfile"
CodeProfilingSaveOptions "SummaryOnly"
CodeProfilingInstrumentation off
SILDebugging off
TargetLang "C"
IncludeBusHierarchyInRTWFileBlockHierarchyMap off
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml off
GenerateWebview off
GenerateCodeMetricsReport off
GenerateCodeReplacementReport off
GenerateMissedCodeReplacementReport off
RTWCompilerOptimization "off"
RTWCustomCompilerOptimizations ""
CheckMdlBeforeBuild "Off"
SharedConstantsCachingThreshold 1024
Array {
Type "Handle"
Dimension 2
Simulink.CodeAppCC {
$ObjectID 15
Version "1.15.0"
Array {
Type "Cell"
Dimension 22
Cell "IgnoreCustomStorageClasses"
Cell "IgnoreTestpoints"
Cell "InsertBlockDesc"
Cell "InsertPolySpaceComments"
Cell "SFDataObjDesc"
Cell "MATLABFcnDesc"
Cell "SimulinkDataObjDesc"
Cell "DefineNamingRule"
Cell "SignalNamingRule"
Cell "ParamNamingRule"
Cell "InternalIdentifier"
Cell "InlinedPrmAccess"
Cell "CustomSymbolStr"
Cell "CustomSymbolStrGlobalVar"
Cell "CustomSymbolStrType"
Cell "CustomSymbolStrField"
Cell "CustomSymbolStrFcn"
Cell "CustomSymbolStrFcnArg"
Cell "CustomSymbolStrBlkIO"
Cell "CustomSymbolStrTmpVar"
Cell "CustomSymbolStrMacro"
Cell "ReqsInCode"
PropName "DisabledProps"
}
ForceParamTrailComments off
GenerateComments on
CommentStyle "Auto"
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
MaxIdLength 31
PreserveName off
PreserveNameWithParent off
ShowEliminatedStatement off
OperatorAnnotations off
IncAutoGenComments off
SimulinkDataObjDesc off
SFDataObjDesc off
MATLABFcnDesc off
IncDataTypeInIds off
MangleLength 1
CustomSymbolStrGlobalVar "$R$N$M"
CustomSymbolStrType "$N$R$M_T"
CustomSymbolStrField "$N$M"
CustomSymbolStrFcn "$R$N$M$F"
CustomSymbolStrFcnArg "rt$I$N$M"
CustomSymbolStrBlkIO "rtb_$N$M"
CustomSymbolStrTmpVar "$N$M"
CustomSymbolStrMacro "$R$N$M"
CustomSymbolStrUtil "$N$C"
DefineNamingRule "None"
ParamNamingRule "None"
SignalNamingRule "None"
InsertBlockDesc off
InsertPolySpaceComments off
SimulinkBlockComments on
MATLABSourceComments off
EnableCustomComments off
InternalIdentifier "Shortened"
InlinedPrmAccess "Literals"
ReqsInCode off
UseSimReservedNames off
}
Simulink.GRTTargetCC {
$BackupClass "Simulink.TargetCC"
$ObjectID 16
Version "1.15.0"
Array {
Type "Cell"
Dimension 14
Cell "GeneratePreprocessorConditionals"
Cell "IncludeMdlTerminateFcn"
Cell "GenerateAllocFcn"
Cell "SuppressErrorStatus"
Cell "ERTCustomFileBanners"
Cell "GenerateSampleERTMain"
Cell "GenerateTestInterfaces"
Cell "ModelStepFunctionPrototypeControlCompliant"
Cell "CPPClassGenCompliant"
Cell "SupportNonInlinedSFcns"
Cell "PurelyIntegerCode"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
PropName "DisabledProps"
}
TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
GenFloatMathFcnCalls "NOT IN USE"
TargetLangStandard "C89/C90 (ANSI)"
CodeReplacementLibrary "None"
UtilityFuncGeneration "Auto"
ERTMultiwordTypeDef "System defined"
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
InferredTypesCompatibility off
GenerateSampleERTMain off
GenerateTestInterfaces off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
ConcurrentExecutionCompliant on
IncludeMdlTerminateFcn on
GeneratePreprocessorConditionals "Disable all"
CombineOutputUpdateFcns on
CombineSignalStateStructs off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
CodeInterfacePackaging "Nonreusable function"
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
ParenthesesLevel "Nominal"
CastingMode "Nominal"
MATLABClassNameForMDSCustomization "Simulink.SoftwareTarget.GRTCustomization"
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant on
AutosarCompliant off
GRTInterface off
GenerateAllocFcn off
GenerateSharedConstants on
UseMalloc off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
RTWCAPIRootIO off
GenerateASAP2 off
MultiInstanceErrorCode "Error"
}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
ConfigPrmDlgPosition [ 2120, 405, 3000, 1035 ]
}
PropName "ConfigurationSets"
}
ExplicitPartitioning off
BlockDefaults {
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
BlockRotation 0
BlockMirror off
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
MaskDefaults {
SelfModifiable "off"
IconFrame "on"
IconOpaque "on"
RunInitForIconRedraw "off"
IconRotate "none"
PortRotate "default"
IconUnits "autoscale"
}
MaskParameterDefaults {
Evaluate "on"
Tunable "on"
NeverSave "off"
Internal "off"
ReadOnly "off"
Enabled "on"
Visible "on"
ToolTip "on"
}
BlockParameterDefaults {
Block {
BlockType From
GotoTag "A"
IconDisplay "Tag"
TagVisibility "local"
}
Block {
BlockType Goto
GotoTag "A"
IconDisplay "Tag"
TagVisibility "local"
}
Block {
BlockType Inport
Port "1"
OutputFunctionCall off
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: auto"
LockScale off
BusOutputAsStruct off
PortDimensions "-1"
VarSizeSig "Inherit"
SampleTime "-1"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchInputForFeedbackSignals off
Interpolate on
}
Block {
BlockType Outport
Port "1"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: auto"
LockScale off
BusOutputAsStruct off
PortDimensions "-1"
VarSizeSig "Inherit"
SampleTime "-1"
SignalType "auto"
SamplingMode "auto"
SourceOfInitialOutputValue "Dialog"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
FunctionInterfaceSpec "void_void"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
DataTypeOverrideAppliesTo "AllNumericTypes"
MinMaxOverflowLogging "UseLocalSettings"
Opaque off
MaskHideContents off
SFBlockType "NONE"
Variant off
GeneratePreprocessorConditionals off
ContentPreviewEnabled off
IsWebBlock off
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
AccumDataTypeStr "Inherit: Inherit via internal rule"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Terminator
}
}
System {
Name "CAL_LIB"
Location [463, 29, 1789, 1056]
Open off
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
SIDHighWatermark "2117"
Block {
BlockType SubSystem
Name "CS"
SID "196"
Ports [3, 4]
Position [20, 16, 410, 334]
ZOrder 3608
LibraryVersion "*1.89"
RequestExecContextInheritance off
System {
Name "CS"
Location [463, 29, 1789, 1056]
Open on
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "60"
Block {
BlockType Inport
Name "LSC_CAL_MICH_ERR"
SID "1711"
Position [455, 348, 485, 362]
ZOrder 3655
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "LSC_CAL_MICH_CTRL"
SID "1710"
Position [455, 463, 485, 477]
ZOrder 3656
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "LSC_CAL_MICH_CTRL2"
SID "2087"
Position [455, 593, 485, 607]
ZOrder 3740
Port "3"
IconDisplay "Port number"
}
Block {
BlockType SubSystem
Name "ACT"
SID "1769"
Ports [1, 4]
Position [520, 753, 700, 1092]
ZOrder 3715
BackgroundColor "green"
RequestExecContextInheritance off
System {
Name "ACT"
Location [441, 28, 1663, 865]
Open off
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "80"
Block {
BlockType Inport
Name "MICH_CTRL"
SID "1770"
Position [170, 103, 200, 117]
ZOrder 3576
IconDisplay "Port number"
}
Block {
BlockType Reference
Name "LINE_BS"
SID "2077"
Ports [1, 3]
Position [350, 65, 525, 155]
ZOrder 3615
LibraryVersion "1.102"
SourceBlock "CAL_LINE/LINE"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE_ETMX"
SID "2071"
Ports [1, 3]
Position [350, 220, 525, 310]
ZOrder 3609
LibraryVersion "1.102"
SourceBlock "CAL_LINE/LINE"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE_ETMY"
SID "2073"
Ports [1, 3]
Position [350, 370, 525, 460]
ZOrder 3611
LibraryVersion "1.102"
SourceBlock "CAL_LINE/LINE"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE_MICH1"
SID "2074"
Ports [1, 3]
Position [350, 525, 525, 615]
ZOrder 3612
LibraryVersion "1.102"
SourceBlock "CAL_LINE/LINE"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Terminator
Name "Terminator1"
SID "2108"
Position [550, 100, 570, 120]
ZOrder 3616
}
Block {
BlockType Terminator
Name "Terminator2"
SID "2109"
Position [550, 130, 570, 150]
ZOrder 3617
}
Block {
BlockType Terminator
Name "Terminator3"
SID "2110"
Position [550, 255, 570, 275]
ZOrder 3618
}
Block {
BlockType Terminator
Name "Terminator4"
SID "2111"
Position [550, 285, 570, 305]
ZOrder 3619
}
Block {
BlockType Terminator
Name "Terminator5"
SID "2112"
Position [550, 405, 570, 425]
ZOrder 3620
}
Block {
BlockType Terminator
Name "Terminator6"
SID "2113"
Position [550, 435, 570, 455]
ZOrder 3621
}
Block {
BlockType Terminator
Name "Terminator7"
SID "2114"
Position [550, 560, 570, 580]
ZOrder 3622
}
Block {
BlockType Terminator
Name "Terminator8"
SID "2115"
Position [550, 590, 570, 610]
ZOrder 3623
}
Block {
BlockType Outport
Name "CAL_LINE_BS"
SID "2075"
Position [620, 73, 650, 87]
ZOrder 3613
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "CAL_LINE_ETMX"
SID "1798"
Position [620, 228, 650, 242]
ZOrder 3543
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "CAL_LINE_ETMY"
SID "1799"
Position [620, 378, 650, 392]
ZOrder 3544
Port "3"
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "CAL_LINE_MICH"
SID "1800"
Position [620, 533, 650, 547]
ZOrder 3545
Port "4"
IconDisplay "Port number"
}
Line {
ZOrder 31
SrcBlock "LINE_ETMX"
SrcPort 1
DstBlock "CAL_LINE_ETMX"
DstPort 1
}
Line {
ZOrder 32
SrcBlock "LINE_ETMY"
SrcPort 1
DstBlock "CAL_LINE_ETMY"
DstPort 1
}
Line {
ZOrder 33
SrcBlock "LINE_MICH1"
SrcPort 1
DstBlock "CAL_LINE_MICH"
DstPort 1
}
Line {
ZOrder 45
SrcBlock "LINE_BS"
SrcPort 1
DstBlock "CAL_LINE_BS"
DstPort 1
}
Line {
ZOrder 30
SrcBlock "MICH_CTRL"
SrcPort 1
Points [58, 0]
Branch {
ZOrder 46
DstBlock "LINE_BS"
DstPort 1
}
Branch {
ZOrder 38
Points [0, 155]
Branch {
ZOrder 50
DstBlock "LINE_ETMX"
DstPort 1
}
Branch {
ZOrder 49
Points [0, 150]
Branch {
ZOrder 44
Points [0, 155]
DstBlock "LINE_MICH1"
DstPort 1
}
Branch {
ZOrder 43
DstBlock "LINE_ETMY"
DstPort 1
}
}
}
}
Line {
ZOrder 54
SrcBlock "LINE_BS"
SrcPort 2
DstBlock "Terminator1"
DstPort 1
}
Line {
ZOrder 55
SrcBlock "LINE_BS"
SrcPort 3
DstBlock "Terminator2"
DstPort 1
}
Line {
ZOrder 56
SrcBlock "LINE_ETMX"
SrcPort 2
DstBlock "Terminator3"
DstPort 1
}
Line {
ZOrder 57
SrcBlock "LINE_ETMX"
SrcPort 3
DstBlock "Terminator4"
DstPort 1
}
Line {
ZOrder 58
SrcBlock "LINE_ETMY"
SrcPort 3
DstBlock "Terminator6"
DstPort 1
}
Line {
ZOrder 59
SrcBlock "LINE_ETMY"
SrcPort 2
DstBlock "Terminator5"
DstPort 1
}
Line {
ZOrder 60
SrcBlock "LINE_MICH1"
SrcPort 2
DstBlock "Terminator7"
DstPort 1
}
Line {
ZOrder 61
SrcBlock "LINE_MICH1"
SrcPort 3
DstBlock "Terminator8"
DstPort 1
}
}
}
Block {
BlockType From
Name "From1"
SID "2080"
Position [995, 860, 1095, 880]
ZOrder 3733
BackgroundColor "orange"
GotoTag "MICH_ERR"
}
Block {
BlockType From
Name "From2"
SID "2081"
Position [995, 970, 1095, 990]
ZOrder 3734
BackgroundColor "lightBlue"
GotoTag "MICH_CAL_A"
}
Block {
BlockType From
Name "From3"
SID "2082"
Position [375, 915, 475, 935]
ZOrder 3735
BackgroundColor "orange"
GotoTag "MICH_ERR"
}
Block {
BlockType From
Name "From4"
SID "2083"
Position [1265, 315, 1365, 335]
ZOrder 3736
BackgroundColor "yellow"
GotoTag "BS_LINE"
}
Block {
BlockType From
Name "From5"
SID "2084"
Position [1265, 410, 1365, 430]
ZOrder 3737
BackgroundColor "yellow"
GotoTag "BS_LINE"
}
Block {
BlockType From
Name "From6"
SID "2085"
Position [1265, 500, 1365, 520]
ZOrder 3738
BackgroundColor "yellow"
GotoTag "ETMY_LINE"
}
Block {
BlockType From
Name "From7"
SID "2086"
Position [1265, 605, 1365, 625]
ZOrder 3739
BackgroundColor "yellow"
GotoTag "MICH_LINE"
}
Block {
BlockType From
Name "From8"
SID "2117"
Position [715, 590, 815, 610]
ZOrder 3751
BackgroundColor "magenta"
GotoTag "MICH_CTRL_B"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From1"
SID "2078"
Position [760, 786, 850, 804]
ZOrder 3732
BackgroundColor "yellow"
ShowName off
FontSize 12
GotoTag "BS_LINE"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From2"
SID "1746"
Position [530, 461, 660, 479]
ZOrder 3698
BackgroundColor "lightBlue"
ShowName off
FontSize 12
GotoTag "MICH_CTRL_A"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From3"
SID "2088"
Position [530, 591, 660, 609]
ZOrder 3741
BackgroundColor "magenta"
ShowName off
FontSize 12
GotoTag "MICH_CTRL_B"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From49"
SID "1748"
Position [530, 346, 660, 364]
ZOrder 3695
BackgroundColor "orange"
ShowName off
FontSize 12
GotoTag "MICH_ERR"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From5"
SID "1858"
Position [760, 871, 850, 889]
ZOrder 3711
BackgroundColor "yellow"
ShowName off
FontSize 12
GotoTag "ETMX_LINE"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From6"
SID "1859"
Position [760, 956, 850, 974]
ZOrder 3712
BackgroundColor "yellow"
ShowName off
FontSize 12
GotoTag "ETMY_LINE"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From7"
SID "1860"
Position [760, 1041, 850, 1059]
ZOrder 3713
BackgroundColor "yellow"
ShowName off
FontSize 12
GotoTag "MICH_LINE"
}
Block {
BlockType SubSystem
Name "PROC"
SID "2091"
Ports [2, 3]
Position [1130, 815, 1365, 1035]
ZOrder 3744
RequestExecContextInheritance off
System {
Name "PROC"
Location [441, 28, 1663, 865]
Open off
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "125"
Block {
BlockType Inport
Name "LSC_CAL_MICH_ERR"
SID "2092"
Position [20, 23, 50, 37]
ZOrder 3743
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "LSC_CAL_MICH_CTRL"
SID "2094"
Position [20, 343, 50, 357]
ZOrder 3745
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Reference
Name "CTRL_ACT"
SID "2102"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section "
"IIR filters, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel"
" inputs. The filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" "
" \nName the part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [180, 208, 250, 232]
ZOrder 3753
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "CTRL_STRAIN"
SID "2099"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section "
"IIR filters, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel"
" inputs. The filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" "
" \nName the part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [180, 338, 250, 362]
ZOrder 3750
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ERR_INVC"
SID "2101"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section "
"IIR filters, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel"
" inputs. The filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" "
" \nName the part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [180, 148, 250, 172]
ZOrder 3752
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ERR_STRAIN"
SID "2098"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section "
"IIR filters, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel"
" inputs. The filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" "
" \nName the part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [180, 18, 250, 42]
ZOrder 3749
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Sum
Name "Sum2"
SID "2100"
Ports [2, 1]
Position [320, 131, 335, 249]
ZOrder 3751
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Outport
Name "CAL_STRAIN"
SID "2097"
Position [380, 183, 410, 197]
ZOrder 3748
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "CAL_ERR_STRAIN"
SID "2095"
Position [380, 23, 410, 37]
ZOrder 3746
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "CAL_CTRL_STRAIN"
SID "2096"
Position [380, 343, 410, 357]
ZOrder 3747
Port "3"
IconDisplay "Port number"
}
Line {
ZOrder 1
SrcBlock "ERR_STRAIN"
SrcPort 1
DstBlock "CAL_ERR_STRAIN"
DstPort 1
}
Line {
ZOrder 2
SrcBlock "CTRL_STRAIN"
SrcPort 1
DstBlock "CAL_CTRL_STRAIN"
DstPort 1
}
Line {
ZOrder 3
SrcBlock "Sum2"
SrcPort 1
DstBlock "CAL_STRAIN"
DstPort 1
}
Line {
ZOrder 4
SrcBlock "ERR_INVC"
SrcPort 1
DstBlock "Sum2"
DstPort 1
}
Line {
ZOrder 5
SrcBlock "CTRL_ACT"
SrcPort 1
DstBlock "Sum2"
DstPort 2
}
Line {
ZOrder 6
SrcBlock "LSC_CAL_MICH_CTRL"
SrcPort 1
Points [60, 0]
Branch {
ZOrder 24
Points [0, -130]
DstBlock "CTRL_ACT"
DstPort 1
}
Branch {
ZOrder 10
DstBlock "CTRL_STRAIN"
DstPort 1
}
}
Line {
ZOrder 16
SrcBlock "LSC_CAL_MICH_ERR"
SrcPort 1
Points [62, 0]
Branch {
ZOrder 23
Points [0, 130]
DstBlock "ERR_INVC"
DstPort 1
}
Branch {
ZOrder 21
DstBlock "ERR_STRAIN"
DstPort 1
}
}
}
}
Block {
BlockType Reference
Name "PROC_C00_STRAIN"
SID "2103"
Tag "Test Point"
Ports [1]
Position [1425, 990, 1465, 1010]
ZOrder 3745
BackgroundColor "green"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "PROC_ERR_STRAIN"
SID "2104"
Tag "Test Point"
Ports [1]
Position [1425, 915, 1465, 935]
ZOrder 3746
BackgroundColor "green"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Terminator
Name "Terminator"
SID "2107"
Position [1435, 840, 1455, 860]
ZOrder 3749
}
Block {
BlockType Terminator
Name "Terminator1"
SID "2116"
Position [865, 590, 885, 610]
ZOrder 3750
}
Block {
BlockType Outport
Name "VIS_CAL_BS_LIME"
SID "1762"
Position [1460, 318, 1490, 332]
ZOrder 3701
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "VIS_CAL_ETMX_LINE"
SID "1760"
Position [1460, 413, 1490, 427]
ZOrder 3699
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "VIS_CAL_ETMY_LINE"
SID "1761"
Position [1460, 503, 1490, 517]
ZOrder 3700
Port "3"
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "LSC_CAL_MICH_LINE"
SID "1759"
Position [1460, 608, 1490, 622]
ZOrder 3705
Port "4"
IconDisplay "Port number"
}
Line {
ZOrder 5
SrcBlock "LSC_CAL_MICH_ERR"
SrcPort 1
DstBlock "POYDC_MXIN_From49"
DstPort 1
}
Line {
ZOrder 45
SrcBlock "From2"
SrcPort 1
DstBlock "PROC"
DstPort 2
}
Line {
ZOrder 7
SrcBlock "LSC_CAL_MICH_CTRL"
SrcPort 1
DstBlock "POYDC_MXIN_From2"
DstPort 1
}
Line {
ZOrder 43
SrcBlock "From1"
SrcPort 1
DstBlock "PROC"
DstPort 1
}
Line {
ZOrder 33
SrcBlock "From7"
SrcPort 1
DstBlock "LSC_CAL_MICH_LINE"
DstPort 1
}
Line {
ZOrder 28
SrcBlock "From3"
SrcPort 1
DstBlock "ACT"
DstPort 1
}
Line {
ZOrder 18
SrcBlock "ACT"
SrcPort 4
DstBlock "POYDC_MXIN_From7"
DstPort 1
}
Line {
ZOrder 19
SrcBlock "ACT"
SrcPort 3
DstBlock "POYDC_MXIN_From6"
DstPort 1
}
Line {
ZOrder 20
SrcBlock "ACT"
SrcPort 2
DstBlock "POYDC_MXIN_From5"
DstPort 1
}
Line {
ZOrder 31
SrcBlock "From5"
SrcPort 1
DstBlock "VIS_CAL_ETMX_LINE"
DstPort 1
}
Line {
ZOrder 32
SrcBlock "From6"
SrcPort 1
DstBlock "VIS_CAL_ETMY_LINE"
DstPort 1
}
Line {
ZOrder 30
SrcBlock "From4"
SrcPort 1
DstBlock "VIS_CAL_BS_LIME"
DstPort 1
}
Line {
ZOrder 25
SrcBlock "ACT"
SrcPort 1
DstBlock "POYDC_MXIN_From1"
DstPort 1
}
Line {
ZOrder 37
SrcBlock "LSC_CAL_MICH_CTRL2"
SrcPort 1
DstBlock "POYDC_MXIN_From3"
DstPort 1
}
Line {
ZOrder 59
SrcBlock "PROC"
SrcPort 2
DstBlock "PROC_ERR_STRAIN"
DstPort 1
}
Line {
ZOrder 66
SrcBlock "PROC"
SrcPort 3
DstBlock "PROC_C00_STRAIN"
DstPort 1
}
Line {
ZOrder 64
SrcBlock "PROC"
SrcPort 1
DstBlock "Terminator"
DstPort 1
}
Line {
ZOrder 68
SrcBlock "From8"
SrcPort 1
DstBlock "Terminator1"
DstPort 1
}
Annotation {
SID "1763"
Name "\nONLINE CALIBRATION\n==============================================\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n"
"\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n"
Position [1305, 902, 2000, 1351]
InternalMargins [0, 0, 0, 0]
FixedHeight on
FixedWidth on
BackgroundColor "[1.000000, 1.000000, 0.000000]"
ZOrder -1
FontSize 18
}
Annotation {
SID "1862"
Name "\nCALIBRATIONS (OSC & DEMODS)\n===============================================\n\n\n\n\n\n "
Position [642, 902, 1221, 1366]
InternalMargins [0, 0, 0, 0]
FixedHeight on
FixedWidth on
BackgroundColor "[0.784314, 1.000000, 0.772549]"
ZOrder -2
FontSize 18
}
}
}
}
}
simulink_archive/simLink/CAL_LINE.mdl 0 → 100644
View file @ 81d2c40c
Library {
Name "CAL_LINE"
Version 8.2
MdlSubVersion 0
SavedCharacterEncoding "UTF-8"
LibraryType "BlockLibrary"
SaveDefaultBlockParams on
ScopeRefreshTime 0.035000
OverrideScopeRefreshTime off
DisableAllScopes off
FPTRunName "Run 1"
MaxMDLFileLineLength 120
Object {
$PropName "BdWindowsInfo"
$ObjectID 1
$ClassName "Simulink.BDWindowsInfo"
Object {
$PropName "WindowsInfo"
$ObjectID 2
$ClassName "Simulink.WindowInfo"
IsActive [1]
Location [125.0, 28.0, 1920.0, 1019.0]
Object {
$PropName "ModelBrowserInfo"
$ObjectID 3
$ClassName "Simulink.ModelBrowserInfo"
Visible [1]
DockPosition "Left"
Width [50]
Height [50]
Filter [9]
}
Object {
$PropName "ExplorerBarInfo"
$ObjectID 4
$ClassName "Simulink.ExplorerBarInfo"
Visible [1]
}
Object {
$PropName "EditorsInfo"
$ObjectID 5
$ClassName "Simulink.EditorInfo"
IsActive [1]
ViewObjType "SimulinkSubsys"
LoadSaveID "196"
Extents [1689.0, 842.0]
ZoomFactor [0.8]
Offset [17.899999999999636, -58.66115970941587]
}
}
}
Created "Mon Jan 26 14:37:40 2015"
Creator "maxime.fays"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "controls"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Fri Sep 08 16:16:44 2017"
RTWModifiedTimeStamp 426788202
ModelVersionFormat "1.%<AutoIncrement:103>"
ConfigurationManager "none"
SampleTimeColors off
SampleTimeAnnotations off
LibraryLinkDisplay "all"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowDesignRanges off
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
ShowTestPointIcons on
ShowSignalResolutionIcons on
ShowViewerIcons on
SortedOrder off
ExecutionContextIcon off
ShowLinearizationAnnotations on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
SimulationMode "normal"
PauseTimes "5"
NumberOfSteps 1
SnapshotBufferSize 10
SnapshotInterval 10
NumberOfLastSnapshots 0
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
RecordCoverage off
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
CovForceBlockReductionOff on
CovEnableCumulative on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeReport off
CovReportOnPause on
CovModelRefEnable "Off"
CovExternalEMLEnable off
ExtModeBatchMode off
ExtModeEnableFloating on
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigDurationFloating "auto"
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
ShowModelReferenceBlockVersion off
ShowModelReferenceBlockIO off
Array {
Type "Handle"
Dimension 1
Simulink.ConfigSet {
$ObjectID 6
Version "1.13.1"
Array {
Type "Handle"
Dimension 8
Simulink.SolverCC {
$ObjectID 7
Version "1.13.1"
StartTime "0.0"
StopTime "10.0"
AbsTol "auto"
FixedStep "auto"
InitialStep "auto"
MaxNumMinSteps "-1"
MaxOrder 5
ZcThreshold "auto"
ConsecutiveZCsStepRelTol "10*128*eps"
MaxConsecutiveZCs "1000"
ExtrapolationOrder 4
NumberNewtonIterations 1
MaxStep "auto"
MinStep "auto"
MaxConsecutiveMinStep "1"
RelTol "1e-3"
SolverMode "Auto"
EnableConcurrentExecution off
ConcurrentTasks off
Solver "ode45"
SolverName "ode45"
SolverJacobianMethodControl "auto"
ShapePreserveControl "DisableAll"
ZeroCrossControl "UseLocalSettings"
ZeroCrossAlgorithm "Nonadaptive"
AlgebraicLoopSolver "TrustRegion"
SolverResetMethod "Fast"
PositivePriorityOrder off
AutoInsertRateTranBlk off
SampleTimeConstraint "Unconstrained"
InsertRTBMode "Whenever possible"
}
Simulink.DataIOCC {
$ObjectID 8
Version "1.13.1"
Decimation "1"
ExternalInput "[t, u]"
FinalStateName "xFinal"
InitialState "xInitial"
LimitDataPoints on
MaxDataPoints "1000"
LoadExternalInput off
LoadInitialState off
SaveFinalState off
SaveCompleteFinalSimState off
SaveFormat "Array"
SignalLoggingSaveFormat "Dataset"
SaveOutput on
SaveState off
SignalLogging on
DSMLogging on
InspectSignalLogs off
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName "xout"
TimeSaveName "tout"
OutputSaveName "yout"
SignalLoggingName "logsout"
DSMLoggingName "dsmout"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
ReturnWorkspaceOutputsName "out"
Refine "1"
}
Simulink.OptimizationCC {
$ObjectID 9
Version "1.13.1"
Array {
Type "Cell"
Dimension 8
Cell "BooleansAsBitfields"
Cell "PassReuseOutputArgsAs"
Cell "PassReuseOutputArgsThreshold"
Cell "ZeroExternalMemoryAtStartup"
Cell "ZeroInternalMemoryAtStartup"
Cell "OptimizeModelRefInitCode"
Cell "NoFixptDivByZeroProtection"
Cell "UseSpecifiedMinMax"
PropName "DisabledProps"
}
BlockReduction on
BooleanDataType on
ConditionallyExecuteInputs on
InlineParams off
UseIntDivNetSlope off
UseFloatMulNetSlope off
DefaultUnderspecifiedDataType "double"
UseSpecifiedMinMax off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
EnhancedBackFolding off
StrengthReduction off
ExpressionFolding on
BooleansAsBitfields off
BitfieldContainerType "uint_T"
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs "Structure reference"
ExpressionDepthLimit 2147483647
FoldNonRolledExpr on
LocalBlockOutputs on
RollThreshold 5
SystemCodeInlineAuto off
StateBitsets off
DataBitsets off
ActiveStateOutputEnumStorageType "Native Integer"
UseTempVars off
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero off
NoFixptDivByZeroProtection off
EfficientFloat2IntCast off
EfficientMapNaN2IntZero on
OptimizeModelRefInitCode off
LifeSpan "inf"
MaxStackSize "Inherit from target"
BufferReusableBoundary on
SimCompilerOptimization "Off"
AccelVerboseBuild off
ParallelExecutionInRapidAccelerator on
}
Simulink.DebuggingCC {
$ObjectID 10
Version "1.13.1"
RTPrefix "error"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
SignalInfNanChecking "none"
SignalRangeChecking "none"
ReadBeforeWriteMsg "UseLocalSettings"
WriteAfterWriteMsg "UseLocalSettings"
WriteAfterReadMsg "UseLocalSettings"
AlgebraicLoopMsg "warning"
ArtificialAlgebraicLoopMsg "warning"
SaveWithDisabledLinksMsg "warning"
SaveWithParameterizedLinksMsg "warning"
CheckSSInitialOutputMsg on
UnderspecifiedInitializationDetection "Classic"
MergeDetectMultiDrivingBlocksExec "none"
CheckExecutionContextPreStartOutputMsg off
CheckExecutionContextRuntimeOutputMsg off
SignalResolutionControl "UseLocalSettings"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
TimeAdjustmentMsg "none"
MaxConsecutiveZCsMsg "error"
MaskedZcDiagnostic "warning"
IgnoredZcDiagnostic "warning"
SolverPrmCheckMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskDSMMsg "error"
MultiTaskCondExecSysMsg "error"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
TasksWithSamePriorityMsg "warning"
SigSpecEnsureSampleTimeMsg "warning"
CheckMatrixSingularityMsg "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterUnderflowMsg "none"
ParameterPrecisionLossMsg "warning"
ParameterTunabilityLossMsg "warning"
FixptConstUnderflowMsg "none"
FixptConstOverflowMsg "none"
FixptConstPrecisionLossMsg "none"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
FcnCallInpInsideContextMsg "EnableAllAsError"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SFcnCompatibilityMsg "none"
FrameProcessingCompatibilityMsg "error"
UniqueDataStoreMsg "none"
BusObjectLabelMismatch "warning"
RootOutportRequireBusObject "warning"
AssertControl "UseLocalSettings"
EnableOverflowDetection off
ModelReferenceIOMsg "none"
ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"
ModelReferenceVersionMismatchMessage "none"
ModelReferenceIOMismatchMessage "none"
ModelReferenceCSMismatchMessage "none"
UnknownTsInhSupMsg "warning"
ModelReferenceDataLoggingMessage "warning"
ModelReferenceSymbolNameMessage "warning"
ModelReferenceExtraNoncontSigs "error"
StateNameClashWarn "warning"
SimStateInterfaceChecksumMismatchMsg "warning"
SimStateOlderReleaseMsg "error"
InitInArrayFormatMsg "warning"
StrictBusMsg "ErrorLevel1"
BusNameAdapt "WarnAndRepair"
NonBusSignalsTreatedAsBus "none"
LoggingUnavailableSignals "error"
BlockIODiagnostic "none"
SFUnusedDataAndEventsDiag "warning"
SFUnexpectedBacktrackingDiag "warning"
SFInvalidInputDataAccessInChartInitDiag "warning"
SFNoUnconditionalDefaultTransitionDiag "warning"
SFTransitionOutsideNaturalParentDiag "warning"
SFUnconditionalTransitionShadowingDiag "warning"
SFUndirectedBroadcastEventsDiag "warning"
SFTransitionActionBeforeConditionDiag "warning"
}
Simulink.HardwareCC {
$ObjectID 11
Version "1.13.1"
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
ProdBitPerLongLong 64
ProdBitPerFloat 32
ProdBitPerDouble 64
ProdBitPerPointer 32
ProdLargestAtomicInteger "Char"
ProdLargestAtomicFloat "None"
ProdIntDivRoundTo "Undefined"
ProdEndianess "Unspecified"
ProdWordSize 32
ProdShiftRightIntArith on
ProdLongLongMode off
ProdHWDeviceType "32-bit Generic"
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
TargetBitPerLongLong 64
TargetBitPerFloat 32
TargetBitPerDouble 64
TargetBitPerPointer 32
TargetLargestAtomicInteger "Char"
TargetLargestAtomicFloat "None"
TargetShiftRightIntArith on
TargetLongLongMode off
TargetIntDivRoundTo "Undefined"
TargetEndianess "Unspecified"
TargetWordSize 32
TargetTypeEmulationWarnSuppressLevel 0
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType "Specified"
TargetUnknown off
ProdEqTarget on
}
Simulink.ModelReferenceCC {
$ObjectID 12
Version "1.13.1"
UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
CheckModelReferenceTargetMessage "error"
EnableParallelModelReferenceBuilds off
ParallelModelReferenceErrorOnInvalidPool on
ParallelModelReferenceMATLABWorkerInit "None"
ModelReferenceNumInstancesAllowed "Multi"
PropagateVarSize "Infer from blocks in model"
ModelReferencePassRootInputsByReference on
ModelReferenceMinAlgLoopOccurrences off
PropagateSignalLabelsOutOfModel off
SupportModelReferenceSimTargetCustomCode off
}
Simulink.SFSimCC {
$ObjectID 13
Version "1.13.1"
SFSimEnableDebug on
SFSimOverflowDetection on
SFSimEcho on
SimBlas on
SimCtrlC on
SimExtrinsic on
SimIntegrity on
SimUseLocalCustomCode off
SimParseCustomCode on
SimBuildMode "sf_incremental_build"
SimGenImportedTypeDefs off
}
Simulink.RTWCC {
$BackupClass "Simulink.RTWCC"
$ObjectID 14
Version "1.13.1"
Array {
Type "Cell"
Dimension 15
Cell "IncludeHyperlinkInReport"
Cell "GenerateTraceInfo"
Cell "GenerateTraceReport"
Cell "GenerateTraceReportSl"
Cell "GenerateTraceReportSf"
Cell "GenerateTraceReportEml"
Cell "PortableWordSizes"
Cell "GenerateWebview"
Cell "GenerateCodeMetricsReport"
Cell "GenerateCodeReplacementReport"
Cell "GenerateErtSFunction"
Cell "CreateSILPILBlock"
Cell "CodeExecutionProfiling"
Cell "CodeProfilingSaveOptions"
Cell "CodeProfilingInstrumentation"
PropName "DisabledProps"
}
SystemTargetFile "grt.tlc"
TLCOptions ""
GenCodeOnly off
MakeCommand "make_rtw"
GenerateMakefile on
PackageGeneratedCodeAndArtifacts off
PackageName ""
TemplateMakefile "grt_default_tmf"
PostCodeGenCommand ""
Description ""
GenerateReport off
SaveLog off
RTWVerbose on
RetainRTWFile off
ProfileTLC off
TLCDebug off
TLCCoverage off
TLCAssert off
ProcessScriptMode "Default"
ConfigurationMode "Optimized"
ProcessScript ""
ConfigurationScript ""
ConfigAtBuild off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
CustomSourceCode ""
CustomHeaderCode ""
CustomInclude ""
CustomSource ""
CustomLibrary ""
CustomInitializer ""
CustomTerminator ""
Toolchain "Automatically locate an installed toolchain"
BuildConfiguration "Faster Builds"
IncludeHyperlinkInReport off
LaunchReport off
PortableWordSizes off
GenerateErtSFunction off
CreateSILPILBlock "None"
CodeExecutionProfiling off
CodeExecutionProfileVariable "executionProfile"
CodeProfilingSaveOptions "SummaryOnly"
CodeProfilingInstrumentation off
SILDebugging off
TargetLang "C"
IncludeBusHierarchyInRTWFileBlockHierarchyMap off
IncludeERTFirstTime off
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml off
GenerateCodeInfo off
GenerateWebview off
GenerateCodeMetricsReport off
GenerateCodeReplacementReport off
RTWCompilerOptimization "Off"
RTWCustomCompilerOptimizations ""
CheckMdlBeforeBuild "Off"
CustomRebuildMode "OnUpdate"
DataInitializer ""
SharedConstantsCachingThreshold 1024
Array {
Type "Handle"
Dimension 2
Simulink.CodeAppCC {
$ObjectID 15
Version "1.13.1"
Array {
Type "Cell"
Dimension 22
Cell "IgnoreCustomStorageClasses"
Cell "IgnoreTestpoints"
Cell "InsertBlockDesc"
Cell "InsertPolySpaceComments"
Cell "SFDataObjDesc"
Cell "MATLABFcnDesc"
Cell "SimulinkDataObjDesc"
Cell "DefineNamingRule"
Cell "SignalNamingRule"
Cell "ParamNamingRule"
Cell "InternalIdentifier"
Cell "InlinedPrmAccess"
Cell "CustomSymbolStr"
Cell "CustomSymbolStrGlobalVar"
Cell "CustomSymbolStrType"
Cell "CustomSymbolStrField"
Cell "CustomSymbolStrFcn"
Cell "CustomSymbolStrFcnArg"
Cell "CustomSymbolStrBlkIO"
Cell "CustomSymbolStrTmpVar"
Cell "CustomSymbolStrMacro"
Cell "ReqsInCode"
PropName "DisabledProps"
}
ForceParamTrailComments off
GenerateComments on
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
MaxIdLength 31
PreserveName off
PreserveNameWithParent off
ShowEliminatedStatement off
OperatorAnnotations off
IncAutoGenComments off
SimulinkDataObjDesc off
SFDataObjDesc off
MATLABFcnDesc off
IncDataTypeInIds off
MangleLength 1
CustomSymbolStrGlobalVar "$R$N$M"
CustomSymbolStrType "$N$R$M_T"
CustomSymbolStrField "$N$M"
CustomSymbolStrFcn "$R$N$M$F"
CustomSymbolStrFcnArg "rt$I$N$M"
CustomSymbolStrBlkIO "rtb_$N$M"
CustomSymbolStrTmpVar "$N$M"
CustomSymbolStrMacro "$R$N$M"
CustomSymbolStrUtil "$N$C"
DefineNamingRule "None"
ParamNamingRule "None"
SignalNamingRule "None"
InsertBlockDesc off
InsertPolySpaceComments off
SimulinkBlockComments on
MATLABSourceComments off
EnableCustomComments off
InternalIdentifier "Shortened"
InlinedPrmAccess "Literals"
ReqsInCode off
UseSimReservedNames off
}
Simulink.GRTTargetCC {
$BackupClass "Simulink.TargetCC"
$ObjectID 16
Version "1.13.1"
Array {
Type "Cell"
Dimension 14
Cell "GeneratePreprocessorConditionals"
Cell "IncludeMdlTerminateFcn"
Cell "GenerateAllocFcn"
Cell "SuppressErrorStatus"
Cell "ERTCustomFileBanners"
Cell "GenerateSampleERTMain"
Cell "GenerateTestInterfaces"
Cell "ModelStepFunctionPrototypeControlCompliant"
Cell "CPPClassGenCompliant"
Cell "SupportNonInlinedSFcns"
Cell "PurelyIntegerCode"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
PropName "DisabledProps"
}
TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
CodeReplacementLibrary "None"
UtilityFuncGeneration "Auto"
ERTMultiwordTypeDef "System defined"
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
ConcurrentExecutionCompliant on
IncludeMdlTerminateFcn on
GeneratePreprocessorConditionals "Disable all"
CombineOutputUpdateFcns on
CombineSignalStateStructs off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
EnableShiftOperators on
ParenthesesLevel "Nominal"
MATLABClassNameForMDSCustomization "Simulink.SoftwareTarget.GRTCustomization"
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant on
AutosarCompliant off
GRTInterface off
GenerateAllocFcn off
UseMalloc off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
RTWCAPIRootIO off
GenerateASAP2 off
}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
ConfigPrmDlgPosition [ 2120, 405, 3000, 1035 ]
}
PropName "ConfigurationSets"
}
ExplicitPartitioning off
BlockDefaults {
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
BlockRotation 0
BlockMirror off
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
MaskDefaults {
SelfModifiable "off"
IconFrame "on"
IconOpaque "on"
RunInitForIconRedraw "off"
IconRotate "none"
PortRotate "default"
IconUnits "autoscale"
}
MaskParameterDefaults {
Evaluate "on"
Tunable "on"
NeverSave "off"
Internal "off"
ReadOnly "off"
Enabled "on"
Visible "on"
ToolTip "on"
}
BlockParameterDefaults {
Block {
BlockType Constant
Value "1"
VectorParams1D on
SamplingMode "Sample based"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Inherit from 'Constant value'"
LockScale off
SampleTime "inf"
FramePeriod "inf"
PreserveConstantTs off
}
Block {
BlockType From
GotoTag "A"
IconDisplay "Tag"
TagVisibility "local"
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParamMin "[]"
ParamMax "[]"
ParamDataTypeStr "Inherit: Same as input"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Goto
GotoTag "A"
IconDisplay "Tag"
TagVisibility "local"
}
Block {
BlockType Ground
}
Block {
BlockType Inport
Port "1"
OutputFunctionCall off
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: auto"
LockScale off
BusOutputAsStruct off
PortDimensions "-1"
VarSizeSig "Inherit"
SampleTime "-1"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchInputForFeedbackSignals off
Interpolate on
}
Block {
BlockType Outport
Port "1"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: auto"
LockScale off
BusOutputAsStruct off
PortDimensions "-1"
VarSizeSig "Inherit"
SampleTime "-1"
SignalType "auto"
SamplingMode "auto"
SourceOfInitialOutputValue "Dialog"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
FunctionInterfaceSpec "void_void"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
DataTypeOverrideAppliesTo "AllNumericTypes"
MinMaxOverflowLogging "UseLocalSettings"
SFBlockType "NONE"
Variant off
GeneratePreprocessorConditionals off
ContentPreviewEnabled off
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
AccumDataTypeStr "Inherit: Inherit via internal rule"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
}
System {
Name "CAL_LINE"
Location [125, 20, 1727, 1043]
Open off
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
SIDHighWatermark "2150"
Block {
BlockType SubSystem
Name "LINE"
SID "196"
Ports [1, 3]
Position [20, 16, 410, 334]
ZOrder 3608
LibraryVersion "*1.89"
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "LINE"
Location [125, 28, 2045, 1047]
Open on
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "80"
Block {
BlockType Inport
Name "MICH_CTRL"
SID "1710"
Position [120, 223, 150, 237]
ZOrder 3656
IconDisplay "Port number"
}
Block {
BlockType Constant
Name "Constant"
SID "2089"
Position [920, 337, 945, 363]
ZOrder 3748
ShowName off
}
Block {
BlockType Reference
Name "DEMOD"
SID "2071"
Description "ADL=LOCKIN.adl"
Ports [1, 3]
Position [215, 177, 335, 283]
ZOrder 3732
ForegroundColor "orange"
BackgroundColor "lightBlue"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.14"
SourceBlock "lockin/LOCKIN"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Product
Name "Divide1"
SID "2086"
Ports [2, 1]
Position [925, 239, 940, 321]
ZOrder 3745
ShowName off
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide2"
SID "2092"
Ports [2, 1]
Position [975, 429, 990, 511]
ZOrder 3751
ShowName off
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide3"
SID "2149"
Ports [2, 1]
Position [1495, 313, 1515, 617]
ZOrder 3805
ShowName off
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide4"
SID "2150"
Ports [2, 1]
Position [1495, 708, 1515, 1012]
ZOrder 3806
ShowName off
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType From
Name "From1"
SID "2076"
Position [385, 415, 465, 435]
ZOrder 3737
BackgroundColor "red"
GotoTag "DEMOD_I"
}
Block {
BlockType From
Name "From11"
SID "2115"
Position [395, 810, 475, 830]
ZOrder 3770
BackgroundColor "darkGreen"
GotoTag "G0_REAL"
}
Block {
BlockType From
Name "From12"
SID "2116"
Position [395, 870, 475, 890]
ZOrder 3771
BackgroundColor "orange"
GotoTag "G0_IMAG"
}
Block {
BlockType From
Name "From13"
SID "2135"
Position [1215, 315, 1295, 335]
ZOrder 3791
BackgroundColor "cyan"
GotoTag "G_REAL"
}
Block {
BlockType From
Name "From14"
SID "2136"
Position [1215, 710, 1295, 730]
ZOrder 3792
BackgroundColor "cyan"
GotoTag "G_REAL"
}
Block {
BlockType From
Name "From15"
SID "2137"
Position [1215, 415, 1295, 435]
ZOrder 3793
BackgroundColor "magenta"
GotoTag "G_IMAG"
}
Block {
BlockType From
Name "From16"
SID "2138"
Position [1220, 805, 1300, 825]
ZOrder 3794
BackgroundColor "magenta"
GotoTag "G_IMAG"
}
Block {
BlockType From
Name "From17"
SID "2139"
Position [1215, 345, 1295, 365]
ZOrder 3795
BackgroundColor "darkGreen"
GotoTag "G0_REAL"
}
Block {
BlockType From
Name "From18"
SID "2140"
Position [1220, 840, 1300, 860]
ZOrder 3796
BackgroundColor "darkGreen"
GotoTag "G0_IMAG"
}
Block {
BlockType From
Name "From19"
SID "2141"
Position [1215, 445, 1295, 465]
ZOrder 3797
BackgroundColor "orange"
GotoTag "G0_IMAG"
}
Block {
BlockType From
Name "From2"
SID "2077"
Position [385, 475, 465, 495]
ZOrder 3738
BackgroundColor "green"
GotoTag "DEMOD_Q"
}
Block {
BlockType From
Name "From20"
SID "2142"
Position [1215, 740, 1295, 760]
ZOrder 3798
BackgroundColor "orange"
GotoTag "G0_IMAG"
}
Block {
BlockType From
Name "From3"
SID "2087"
Position [790, 250, 870, 270]
ZOrder 3746
BackgroundColor "red"
GotoTag "DEMOD_I"
}
Block {
BlockType From
Name "From4"
SID "2091"
Position [790, 290, 870, 310]
ZOrder 3750
BackgroundColor "lightBlue"
GotoTag "DEMOD_SQ"
}
Block {
BlockType From
Name "From5"
SID "2093"
Position [800, 440, 880, 460]
ZOrder 3752
BackgroundColor "green"
GotoTag "DEMOD_Q"
}
Block {
BlockType From
Name "From6"
SID "2094"
Position [800, 480, 880, 500]
ZOrder 3753
BackgroundColor "lightBlue"
GotoTag "DEMOD_SQ"
}
Block {
BlockType From
Name "From7"
SID "2147"
Position [1215, 530, 1295, 550]
ZOrder 3803
BackgroundColor "gray"
GotoTag "G0_2"
}
Block {
BlockType From
Name "From8"
SID "2148"
Position [1220, 925, 1300, 945]
ZOrder 3804
BackgroundColor "gray"
GotoTag "G0_2"
}
Block {
BlockType Gain
Name "Gain1"
SID "2143"
Position [1320, 735, 1350, 765]
ZOrder 3799
ShowName off
Gain "-1"
ParamDataTypeStr "Inherit: Inherit via internal rule"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "Gain2"
SID "2144"
Position [915, 435, 945, 465]
ZOrder 3800
ShowName off
Gain "-1"
ParamDataTypeStr "Inherit: Inherit via internal rule"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Ground
Name "Ground"
SID "2101"
Position [305, 665, 325, 685]
ZOrder 3757
}
Block {
BlockType Ground
Name "Ground1"
SID "2102"
Position [305, 725, 325, 745]
ZOrder 3758
}
Block {
BlockType Goto
Name "POYDC_MXIN_From1"
SID "2090"
Position [620, 456, 710, 474]
ZOrder 3749
BackgroundColor "lightBlue"
ShowName off
FontSize 12
GotoTag "DEMOD_SQ"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From2"
SID "2073"
Position [370, 221, 460, 239]
ZOrder 3734
BackgroundColor "red"
ShowName off
FontSize 12
GotoTag "DEMOD_I"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From3"
SID "2074"
Position [370, 256, 460, 274]
ZOrder 3735
BackgroundColor "green"
ShowName off
FontSize 12
GotoTag "DEMOD_Q"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From4"
SID "2099"
Position [380, 666, 470, 684]
ZOrder 3755
BackgroundColor "darkGreen"
ShowName off
FontSize 12
GotoTag "G0_REAL"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From5"
SID "2100"
Position [380, 726, 470, 744]
ZOrder 3756
BackgroundColor "orange"
ShowName off
FontSize 12
GotoTag "G0_IMAG"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From6"
SID "2117"
Position [630, 851, 720, 869]
ZOrder 3775
BackgroundColor "gray"
ShowName off
FontSize 12
GotoTag "G0_2"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From7"
SID "2124"
Position [1050, 306, 1140, 324]
ZOrder 3779
BackgroundColor "cyan"
ShowName off
FontSize 12
GotoTag "G_REAL"
}
Block {
BlockType Goto
Name "POYDC_MXIN_From8"
SID "2125"
Position [1050, 461, 1140, 479]
ZOrder 3780
BackgroundColor "magenta"
ShowName off
FontSize 12
GotoTag "G_IMAG"
}
Block {
BlockType Product
Name "Product1"
SID "2082"
Ports [2, 1]
Position [520, 477, 550, 508]
ZOrder 3742
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product2"
SID "2118"
Ports [2, 1]
Position [530, 872, 560, 903]
ZOrder 3773
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product3"
SID "2119"
Ports [2, 1]
Position [530, 812, 560, 843]
ZOrder 3772
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product4"
SID "2122"
Ports [2, 1]
Position [1370, 409, 1395, 471]
ZOrder 3777
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product48"
SID "2081"
Ports [2, 1]
Position [520, 417, 550, 448]
ZOrder 3741
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product5"
SID "2131"
Ports [2, 1]
Position [1370, 704, 1395, 766]
ZOrder 3788
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product6"
SID "2121"
Ports [2, 1]
Position [1370, 308, 1395, 372]
ZOrder 3776
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product7"
SID "2132"
Ports [2, 1]
Position [1370, 799, 1395, 866]
ZOrder 3787
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum"
SID "2083"
Ports [2, 1]
Position [570, 403, 590, 527]
ZOrder 3743
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum1"
SID "2088"
Ports [2, 1]
Position [975, 244, 990, 386]
ZOrder 3747
ShowName off
Inputs "+-"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum3"
SID "2120"
Ports [2, 1]
Position [580, 798, 600, 922]
ZOrder 3774
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum4"
SID "2130"
Ports [2, 1]
Position [1420, 289, 1445, 491]
ZOrder 3786
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum5"
SID "2133"
Ports [2, 1]
Position [1420, 684, 1445, 886]
ZOrder 3790
ShowName off
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Outport
Name "CAL_LINE"
SID "1759"
Position [1560, 188, 1590, 202]
ZOrder 3705
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "REAL"
SID "2145"
Position [1560, 458, 1590, 472]
ZOrder 3801
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "IMAG"
SID "2146"
Position [1560, 853, 1590, 867]
ZOrder 3802
Port "3"
IconDisplay "Port number"
}
Line {
ZOrder 27
SrcBlock "DEMOD"
SrcPort 1
DstBlock "CAL_LINE"
DstPort 1
}
Line {
ZOrder 26
SrcBlock "MICH_CTRL"
SrcPort 1
DstBlock "DEMOD"
DstPort 1
}
Line {
ZOrder 28
SrcBlock "DEMOD"
SrcPort 3
DstBlock "POYDC_MXIN_From3"
DstPort 1
}
Line {
ZOrder 29
SrcBlock "DEMOD"
SrcPort 2
DstBlock "POYDC_MXIN_From2"
DstPort 1
}
Line {
ZOrder 44
SrcBlock "From1"
SrcPort 1
Points [16, 0]
Branch {
ZOrder 48
Points [0, 15]
DstBlock "Product48"
DstPort 2
}
Branch {
ZOrder 46
DstBlock "Product48"
DstPort 1
}
}
Line {
ZOrder 50
SrcBlock "From2"
SrcPort 1
Points [15, 0]
Branch {
ZOrder 54
Points [0, 15]
DstBlock "Product1"
DstPort 2
}
Branch {
ZOrder 52
DstBlock "Product1"
DstPort 1
}
}
Line {
ZOrder 55
SrcBlock "Product48"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
ZOrder 56
SrcBlock "Product1"
SrcPort 1
DstBlock "Sum"
DstPort 2
}
Line {
ZOrder 64
SrcBlock "Sum"
SrcPort 1
DstBlock "POYDC_MXIN_From1"
DstPort 1
}
Line {
ZOrder 59
SrcBlock "From3"
SrcPort 1
DstBlock "Divide1"
DstPort 1
}
Line {
ZOrder 60
SrcBlock "Divide1"
SrcPort 1
DstBlock "Sum1"
DstPort 1
}
Line {
ZOrder 61
SrcBlock "Constant"
SrcPort 1
DstBlock "Sum1"
DstPort 2
}
Line {
ZOrder 65
SrcBlock "From4"
SrcPort 1
DstBlock "Divide1"
DstPort 2
}
Line {
ZOrder 135
SrcBlock "From5"
SrcPort 1
DstBlock "Gain2"
DstPort 1
}
Line {
ZOrder 67
SrcBlock "From6"
SrcPort 1
DstBlock "Divide2"
DstPort 2
}
Line {
ZOrder 69
SrcBlock "Ground1"
SrcPort 1
DstBlock "POYDC_MXIN_From5"
DstPort 1
}
Line {
ZOrder 70
SrcBlock "Ground"
SrcPort 1
DstBlock "POYDC_MXIN_From4"
DstPort 1
}
Line {
ZOrder 83
SrcBlock "From11"
SrcPort 1
Points [16, 0]
Branch {
ZOrder 82
Points [0, 15]
DstBlock "Product3"
DstPort 2
}
Branch {
ZOrder 81
DstBlock "Product3"
DstPort 1
}
}
Line {
ZOrder 86
SrcBlock "From12"
SrcPort 1
Points [15, 0]
Branch {
ZOrder 85
Points [0, 15]
DstBlock "Product2"
DstPort 2
}
Branch {
ZOrder 84
DstBlock "Product2"
DstPort 1
}
}
Line {
ZOrder 87
SrcBlock "Product3"
SrcPort 1
DstBlock "Sum3"
DstPort 1
}
Line {
ZOrder 88
SrcBlock "Product2"
SrcPort 1
DstBlock "Sum3"
DstPort 2
}
Line {
ZOrder 89
SrcBlock "Sum3"
SrcPort 1
DstBlock "POYDC_MXIN_From6"
DstPort 1
}
Line {
ZOrder 96
SrcBlock "Sum1"
SrcPort 1
DstBlock "POYDC_MXIN_From7"
DstPort 1
}
Line {
ZOrder 97
SrcBlock "Divide2"
SrcPort 1
DstBlock "POYDC_MXIN_From8"
DstPort 1
}
Line {
ZOrder 117
SrcBlock "Product6"
SrcPort 1
DstBlock "Sum4"
DstPort 1
}
Line {
ZOrder 118
SrcBlock "Product4"
SrcPort 1
DstBlock "Sum4"
DstPort 2
}
Line {
ZOrder 150
SrcBlock "Sum4"
SrcPort 1
DstBlock "Divide3"
DstPort 1
}
Line {
ZOrder 147
SrcBlock "Product7"
SrcPort 1
DstBlock "Sum5"
DstPort 2
}
Line {
ZOrder 143
SrcBlock "Product5"
SrcPort 1
DstBlock "Sum5"
DstPort 1
}
Line {
ZOrder 153
SrcBlock "Sum5"
SrcPort 1
DstBlock "Divide4"
DstPort 1
}
Line {
ZOrder 123
SrcBlock "From13"
SrcPort 1
DstBlock "Product6"
DstPort 1
}
Line {
ZOrder 127
SrcBlock "From14"
SrcPort 1
DstBlock "Product5"
DstPort 1
}
Line {
ZOrder 125
SrcBlock "From15"
SrcPort 1
DstBlock "Product4"
DstPort 1
}
Line {
ZOrder 128
SrcBlock "From16"
SrcPort 1
DstBlock "Product7"
DstPort 1
}
Line {
ZOrder 129
SrcBlock "From17"
SrcPort 1
DstBlock "Product6"
DstPort 2
}
Line {
ZOrder 130
SrcBlock "From18"
SrcPort 1
DstBlock "Product7"
DstPort 2
}
Line {
ZOrder 131
SrcBlock "From19"
SrcPort 1
DstBlock "Product4"
DstPort 2
}
Line {
ZOrder 145
SrcBlock "From20"
SrcPort 1
DstBlock "Gain1"
DstPort 1
}
Line {
ZOrder 146
SrcBlock "Gain1"
SrcPort 1
DstBlock "Product5"
DstPort 2
}
Line {
ZOrder 136
SrcBlock "Gain2"
SrcPort 1
DstBlock "Divide2"
DstPort 1
}
Line {
ZOrder 149
SrcBlock "Divide3"
SrcPort 1
DstBlock "REAL"
DstPort 1
}
Line {
ZOrder 151
SrcBlock "From7"
SrcPort 1
DstBlock "Divide3"
DstPort 2
}
Line {
ZOrder 154
SrcBlock "From8"
SrcPort 1
DstBlock "Divide4"
DstPort 2
}
Line {
ZOrder 155
SrcBlock "Divide4"
SrcPort 1
DstBlock "IMAG"
DstPort 1
}
}
}
}
}
simulink_archive/simLink/CDS_PARTS.mdl 0 → 100644
View file @ 81d2c40c
This source diff could not be displayed because it is too large. You can view the blob instead.
simulink_archive/simLink/CDS_PARTS.mdl.r2012b 0 → 100644
View file @ 81d2c40c
This source diff could not be displayed because it is too large. You can view the blob instead.
simulink_archive/simLink/CD_STATE_MACHINE.c 0 → 100644
View file @ 81d2c40c
/*
* CD_STATE_MACHINE.c
* JCB Oct 4, 2011
*
* CD_STATE_MACHINE is a compilation of state machines for setting the
* binary output of the coil drivers for the suspensions so as to match
* the digital simulated anti-imaging filters states to the opposite of
* the analog anti-imaging filter states.
*
* Functions are:
* PUM
* TOP
* TACQ
* TACQ_M2
* UIM
* SINGLE
* ESD
* ESD_ITM
*
* INPUTS:
* argin[0] = coilTestEnable
* argin[1] = epicsStateRequest
* argin[2] = iscRequest
* argin[3] = msDelayTurnOn
* argin[4] = msDelayTurnOff
* PUM ONLY: argin[5] = analogRmsWdReset
*
* ESD and ESD_ITM ONLY:
* argin[0] = epicsStateRequest
* argin[1] = iscRequest
* argin[2] = msDelayTurnOn
* argin[3] = msDelayTurnOff
*
* OUTPUTS:
* argout[0] = digital filter mask bits
* argout[1] = digital filter control bits
* argout[2] = binary output control bits
*/
//PUM - handles the 4 OSEM Penultimate Mass stages for QUADs
// Digital Anti AcqOn, Anti AcqOff, Anti Low Pass are always ON
// STATE 1 => Analog Acq OFF, Low Pass OFF
// Digital Sim AcqOff ON, Sim AcqOn OFF, Sim Low Pass ON
// STATE 2 => Analog Acq On, Low Pass OFF
// Digital Sim AcqOff OFF, Sim AcqOn ON, Sim Low Pass ON
// STATE 3 => Analog Acq OFF, Low Pass ON
// Digital Sim AcqOff ON, Sim AcqOn OFF, Sim Low Pass OFF
// STATE 4 => Analog Acq ON, Low Pass ON
// Digital Sim AcqOff OFF, Sim AcqOn ON, Sim Low Pass OFF
//Takes 6 inputs:
//COIL / TEST ENABLE (0 for Coil or 1 for Test)
//EPICS state request (0 hands control to ISC fast request)
//ISC Fast state request
//Turn On Delay (How many ms to wait before switching digital filters when analog filters are turning on)
//Turn Off Delay (How many ms to wait before switching digital filters when analog filters are turning off)
//PUM Analog RMS Watchdog Momentary Reset
//Provides 3 outputs:
//argout[0] is Mask bit for Filter module
//argout[1] is Control bit for Filter module
//argout[2] is control bits for BO card
// 1st bit (1) (rightmost) is Low Pass On/Off
// 2nd bit (2) is PUM Analog RMS Watchdog Momentary reset
// 3rd bit (4) is Acquire On/Off
// 4th bit (8) is Test Coil Enable
void PUM(double *argin, int nargin, double *argout, int nargout) {
// Analog filter switching delay -> Cycles to wait before sending command to digital filters
static long cycleCounter = 0;
// Last state we finished going to
static int state = 1;
// State we've been requested to go to
static int request = 1;
// Initialize control bit variables
int analog_control_bits = 0b0;
int initial_analog_control_bits = 0b0;
int digital_control_bits;
int digital_mask_bits = 0b0;
int digital_turn_on_mask = 0b0;
int digital_stay_the_same_mask = 0b0;
int analog_to_digital_control[3][2];
int mask_user_override = 0;
int analog_bit;
// Set always on digital control bits
digital_control_bits = 0b0011100000;
// Set up digital filter state depending on analog filter state
analog_to_digital_control[2][0] = 0b0000000010; //Analog LP filter Off
analog_to_digital_control[2][1] = 0b0000000001; //Analog LP filter On
analog_to_digital_control[1][0] = 0b0000000000; //Readback, so no control
analog_to_digital_control[1][1] = 0b0000000000; //Readback, so no control
analog_to_digital_control[0][0] = 0b0000000100; //Analog Acquire filter Off
analog_to_digital_control[0][1] = 0b0000000000; //Analog Acquire filter On
// Read inputs
int coilTestEnable = argin[0]; //0 => Digital control for Coil driver, 1 => use Test Analog in
int epicsStateRequest = argin[1]; //State request from Epics
int iscRequest = argin[2]; // State request from isc
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning ON
double msDelayTurnOn = argin[3];
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning OFF
double msDelayTurnOff =argin[4];
int analogRmsWdReset = argin[5]; //Request to reset analog RMS watchdog
// Cycles to delay before switching digital filters
long cycleDelayTurnOn = msDelayTurnOn * FE_RATE / 1000; //Used when analog filters turning on
long cycleDelayTurnOff = msDelayTurnOff * FE_RATE /1000; //Used when analog filters turning off
// If we're not already changing states, go ahead and check
if (cycleCounter == 0) {
// Epics state 0 => use ISC request
if (epicsStateRequest == 0) {
request = iscRequest;
} else {
request = epicsStateRequest;
// Set an a manual override, so user can control digital filters
// Only affects the mask bits
if (epicsStateRequest < 0) {
mask_user_override = 1;
request = -epicsStateRequest;
}
}
}
//If request is not equal to state, then we are changing states and need to count
if (request != state) {
cycleCounter++;
//We've waited for cycleDelay, now finish the transition to request from state
if ((cycleCounter > cycleDelayTurnOn) && (cycleCounter > cycleDelayTurnOff)) {
cycleCounter = 0;
state = request;
}
}
// Request transitions (handles analog switching)
// 2nd bit is for analog watchdog momentary reset - handled later
switch (request) {
case 1: // To STATE 1
analog_control_bits = 0b000; // LP Off (1st 0), Acq Off (3rd 0)
break;
case 2: // To STATE 2
analog_control_bits = 0b100; //LP Off (1st 0), Acq On (3rd 1)
break;
case 3:
analog_control_bits = 0b001; // LP On (1st 1), Acq Off (3rd 0)
break;
case 4:
analog_control_bits = 0b101; // LP On (1st 1), Acq On (3rd 1)
break;
default: //Default state - everything off
analog_control_bits = 0b000;
break;
}
// If cycleCounter = 0, then we are not changing states
// Base the digital filters choices on the request analog bits (request == state in this case)
if (cycleCounter == 0) {
for (analog_bit=0 ; analog_bit < 3 ; analog_bit++ ) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
}
// Handle the case where were changing states
} else {
// Prior state control bit (used to determine if an analog filter is turning on or off)
// 2nd bit is not used - represent Reset Monitor bit - but there's a single reset for entire board
switch (state) {
case 1: // To STATE 1
initial_analog_control_bits = 0b000; // LP Off (1st 0), Acq Off (3rd 0)
break;
case 2: // To STATE 2
initial_analog_control_bits = 0b100; //LP Off (1st 0), Acq On (3rd 1)
break;
case 3:
initial_analog_control_bits = 0b001; // LP On (1st 1), Acq Off (3rd 0)
break;
case 4:
initial_analog_control_bits = 0b101; // LP On (1st 1), Acq On (3rd 1)
break;
default: //Default state - everything off
initial_analog_control_bits = 0b000;
break;
}
// Determine if an analog filter is turning on versus turning off or staying the same
// 1 indicates that case applies (turn on, turn off, or stay the same)
digital_turn_on_mask = (~(initial_analog_control_bits) & analog_control_bits);
digital_stay_the_same_mask = ~(initial_analog_control_bits ^ analog_control_bits);
// Cycle through all the analog bits
// Determine if the analog bits are staying the same
// If so, keep the associated digital filters in the same state
// If the analog bits are turning on, determine if we've waited long enough,
// then change the associated digital filters to the on state. Otherwise, keep them in the off state.
// If the analog bits are turning off, determine if we've waited long enough,
// then change the associated digital filters to the off state. Otherwise, keep them in the on state.
for (analog_bit=0 ; analog_bit < 3 ; analog_bit++ ) {
if (0b1 & (digital_stay_the_same_mask >> analog_bit)) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else if ( 0b1 & (digital_turn_on_mask >> analog_bit)) {
if (cycleCounter > cycleDelayTurnOn) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else {
if (cycleCounter > cycleDelayTurnOff) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
}
}
}
} // Finished with the case where states are changing
//Set digital_mask_bits, used by Filter module to determine which filters are under front end control
//Simple for now - in principle could be made more specific like the above digital control bits and placed
//inside the state transition codea
if (mask_user_override == 0) {
digital_mask_bits = 0b0011100111;
} else {
digital_mask_bits = 0b0000000000;
}
//If coil enabled, need to turn 4th bit on (add 8)
if (coilTestEnable == 1) {
analog_control_bits = analog_control_bits + 8; //Analog filter control bits
}
//If reset analog RMS Watchdog set high, turn on 2nd bit (add 2)
if (analogRmsWdReset == 1) {
analog_control_bits = analog_control_bits + 2; //Analog filter control bits
}
//Send out the calculated bits
argout[0] = (double) digital_mask_bits;
argout[1] = (double) digital_control_bits;
argout[2] = (double) analog_control_bits;
return;
}
void ESD(double *argin, int nargin, double *argout, int nargout) {
// Analog filter switching delay -> Cycles to wait before sending command to digital filters
static long cycleCounter = 0;
//Last state we finished going to
static int state = 1;
//State we've been requested to go to
static int request = 1;
//Initialize control bit variables
int analog_control_bits = 0b0;
int initial_analog_control_bits = 0b0;
int digital_control_bits;
int digital_mask_bits = 0b0;
int digital_turn_on_mask = 0b0;
int digital_stay_the_same_mask = 0b0;
int analog_to_digital_control[1][2];
int mask_user_override = 0;
int analog_bit;
// Set always on digital control bits
digital_control_bits = 0b0001100000;
// Set up digital filter state depending on analog filter state
analog_to_digital_control[0][0] = 0b0000000010; //Analog LP filter Off
analog_to_digital_control[0][1] = 0b0000000000; //Analog LP filter On
// Read inputs
int epicsStateRequest = argin[0]; //State request from Epics
int iscRequest = argin[1]; // State request from isc
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning ON
double msDelayTurnOn = argin[2];
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning OFF
double msDelayTurnOff =argin[3];
// Cycles to delay before switching digital filters
long cycleDelayTurnOn = msDelayTurnOn * FE_RATE / 1000; //Used when analog filters turning on
long cycleDelayTurnOff = msDelayTurnOff * FE_RATE /1000; //Used when analog filters turning off
//If we're not already changing states, go ahead and check
if (cycleCounter == 0) {
// Epics state 0 => use ISC request
if (epicsStateRequest == 0) {
request = iscRequest;
} else {
request = epicsStateRequest;
// Set an a manual override, so user can control digital filters
// Only affects the mask bits
if (epicsStateRequest < 0) {
mask_user_override = 1;
request = -epicsStateRequest;
}
}
}
//If request is not equal to state, then we are changing states and need to count
if (request != state) {
cycleCounter++;
//We've waited for cycleDelay, now finish the transition to request from state
if ((cycleCounter > cycleDelayTurnOn) && (cycleCounter > cycleDelayTurnOff)) {
cycleCounter = 0;
state = request;
}
}
// Request transitions (handles analog switching)
switch (request) {
case 1: // To STATE 1
analog_control_bits = 0b0; // LP Off (0)
break;
case 2: // To STATE 2
analog_control_bits = 0b1; //LP ON (1)
break;
default: //Default state - everything off
analog_control_bits = 0b0;
break;
}
// If cycleCounter = 0, then we are not changing states
// Base the digital filters choices on the request analog bits (request == state in this case)
if (cycleCounter == 0) {
for (analog_bit=0 ; analog_bit < 1 ; analog_bit++ ) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
}
// Handle the case where were changing states
} else {
// Prior state control bit (used to determine if an analog filter is turning on or off)
switch (state) {
case 1: // To STATE 1
initial_analog_control_bits = 0b0; // LP Off (0)
break;
case 2: // To STATE 2
initial_analog_control_bits = 0b1; //LP ON (1)
break;
default: //Default state - everything off
initial_analog_control_bits = 0b0;
break;
}
// Determine if an analog filter is turning on versus turning off or staying the same
// 1 indicates that case applies (turn on, turn off, or stay the same)
digital_turn_on_mask = (~(initial_analog_control_bits) & analog_control_bits);
digital_stay_the_same_mask = ~(initial_analog_control_bits ^ analog_control_bits);
// Cycle through all the analog bits
// Determine if the analog bits are staying the same
// If so, keep the associated digital filters in the same state
// If the analog bits are turning on, determine if we've waited long enough,
// then change the associated digital filters to the on state. Otherwise, keep them in the off state.
// If the analog bits are turning off, determine if we've waited long enough,
// then change the associated digital filters to the off state. Otherwise, keep them in the on state.
for (analog_bit=0 ; analog_bit < 1 ; analog_bit++ ) {
if (0b1 & (digital_stay_the_same_mask >> analog_bit)) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else if ( 0b1 & (digital_turn_on_mask >> analog_bit)) {
if (cycleCounter > cycleDelayTurnOn) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else {
if (cycleCounter > cycleDelayTurnOff) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
}
}
}
} // Finished with the case where states are changing
//Set digital_mask_bits, used by Filter module to determine which filters are under front end control
//Simple for now - in principle could be made more specific like the above digital control bits and placed
//inside the state transition code
if (mask_user_override == 0) {
digital_mask_bits = 0b0011100111;
} else {
digital_mask_bits = 0b0000000000;
}
//Send out the calculated bits
argout[0] = (double) digital_mask_bits;
argout[1] = (double) digital_control_bits;
argout[2] = (double) analog_control_bits;
return;
}
void ESD_ITM(double *argin, int nargin, double *argout, int nargout) {
// Analog filter switching delay -> Cycles to wait before sending command to digital filters
static long cycleCounter = 0;
//Last state we finished going to
static int state = 1;
//State we've been requested to go to
static int request = 1;
//Initialize control bit variables
int analog_control_bits = 0b0;
int initial_analog_control_bits = 0b0;
int digital_control_bits;
int digital_mask_bits = 0b0;
int digital_turn_on_mask = 0b0;
int digital_stay_the_same_mask = 0b0;
int analog_to_digital_control[1][2];
int mask_user_override = 0;
int analog_bit;
// Set always on digital control bits
digital_control_bits = 0b0000100000;
// Set up digital filter state depending on analog filter state
analog_to_digital_control[0][0] = 0b0000000001; //Analog LP filter Off
analog_to_digital_control[0][1] = 0b0000000000; //Analog LP filter On
// Read inputs
int epicsStateRequest = argin[0]; //State request from Epics
int iscRequest = argin[1]; // State request from isc
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning ON
double msDelayTurnOn = argin[2];
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning OFF
double msDelayTurnOff =argin[3];
// Cycles to delay before switching digital filters
long cycleDelayTurnOn = msDelayTurnOn * FE_RATE / 1000; //Used when analog filters turning on
long cycleDelayTurnOff = msDelayTurnOff * FE_RATE /1000; //Used when analog filters turning off
//If we're not already changing states, go ahead and check
if (cycleCounter == 0) {
// Epics state 0 => use ISC request
if (epicsStateRequest == 0) {
request = iscRequest;
} else {
request = epicsStateRequest;
// Set an a manual override, so user can control digital filters
// Only affects the mask bits
if (epicsStateRequest < 0) {
mask_user_override = 1;
request = -epicsStateRequest;
}
}
}
//If request is not equal to state, then we are changing states and need to count
if (request != state) {
cycleCounter++;
//We've waited for cycleDelay, now finish the transition to request from state
if ((cycleCounter > cycleDelayTurnOn) && (cycleCounter > cycleDelayTurnOff)) {
cycleCounter = 0;
state = request;
}
}
// Request transitions (handles analog switching)
switch (request) {
case 1: // To STATE 1
analog_control_bits = 0b0; // LP Off (0)
break;
case 2: // To STATE 2
analog_control_bits = 0b1; //LP ON (1)
break;
default: //Default state - everything off
analog_control_bits = 0b0;
break;
}
// If cycleCounter = 0, then we are not changing states
// Base the digital filters choices on the request analog bits (request == state in this case)
if (cycleCounter == 0) {
for (analog_bit=0 ; analog_bit < 1 ; analog_bit++ ) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
}
// Handle the case where were changing states
} else {
// Prior state control bit (used to determine if an analog filter is turning on or off)
switch (state) {
case 1: // To STATE 1
initial_analog_control_bits = 0b0; // LP Off (0)
break;
case 2: // To STATE 2
initial_analog_control_bits = 0b1; //LP ON (1)
break;
default: //Default state - everything off
initial_analog_control_bits = 0b0;
break;
}
// Determine if an analog filter is turning on versus turning off or staying the same
// 1 indicates that case applies (turn on, turn off, or stay the same)
digital_turn_on_mask = (~(initial_analog_control_bits) & analog_control_bits);
digital_stay_the_same_mask = ~(initial_analog_control_bits ^ analog_control_bits);
// Cycle through all the analog bits
// Determine if the analog bits are staying the same
// If so, keep the associated digital filters in the same state
// If the analog bits are turning on, determine if we've waited long enough,
// then change the associated digital filters to the on state. Otherwise, keep them in the off state.
// If the analog bits are turning off, determine if we've waited long enough,
// then change the associated digital filters to the off state. Otherwise, keep them in the on state.
for (analog_bit=0 ; analog_bit < 1 ; analog_bit++ ) {
if (0b1 & (digital_stay_the_same_mask >> analog_bit)) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else if ( 0b1 & (digital_turn_on_mask >> analog_bit)) {
if (cycleCounter > cycleDelayTurnOn) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else {
if (cycleCounter > cycleDelayTurnOff) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
}
}
}
} // Finished with the case where states are changing
//Set digital_mask_bits, used by Filter module to determine which filters are under front end control
//Simple for now - in principle could be made more specific like the above digital control bits and placed
//inside the state transition code
if (mask_user_override == 0) {
digital_mask_bits = 0b0011100111;
} else {
digital_mask_bits = 0b0000000000;
}
//Send out the calculated bits
argout[0] = (double) digital_mask_bits;
argout[1] = (double) digital_control_bits;
argout[2] = (double) analog_control_bits;
return;
}
//TOP - handles the 6 OSEM top stages for QUADs, HXTS, BSFM, HAUX,TMTS, OMCS
// Digital Anti Acq, Anti Low Pass are always ON
// STATE 1 => Analog Low Pass OFF
// Sim Low Pass ON
// STATE 2 => Analog Low Pass OFF
// Sim Low Pass OFF
//Takes 5 inputs:
//COIL / TEST ENABLE (0 for Coil or 1 for Test)
//EPICS state request (0 hands control to ISC fast request)
//ISC Fast state request0
//Turn On Delay (How many ms to wait before switching digital filters when analog filters are turning on)
//Turn Off Delay (How many ms to wait before switching digital filters when analog filters are turning off)
//Provides 3 outputs:
//argout[0] is Mask bit for Filter module
//argout[1] is Control bit for Filter module
//argout[2] is control bits for BO card
// 1st bit (1) (rightmost) is Low Pass On/Off
// 2nd bit (2) is Test Coil Enable
void TOP(double *argin, int nargin, double *argout, int nargout) {
// Analog filter switching delay -> Cycles to wait before sending command to digital filters
static long cycleCounter = 0;
//Last state we finished going to
static int state = 1;
//State we've been requested to go to
static int request = 1;
//Initialize control bit variables
int analog_control_bits = 0b0;
int initial_analog_control_bits = 0b0;
int digital_control_bits;
int digital_mask_bits = 0b0;
int digital_turn_on_mask = 0b0;
int digital_stay_the_same_mask = 0b0;
int analog_to_digital_control[1][2];
int mask_user_override = 0;
int analog_bit;
// Set always on digital control bits
digital_control_bits = 0b0001100000;
// Set up digital filter state depending on analog filter state
analog_to_digital_control[0][0] = 0b0000000010; //Analog LP filter Off
analog_to_digital_control[0][1] = 0b0000000000; //Analog LP filter On
// Read inputs
int coilTestEnable = argin[0]; //0 => Digital control for Coil driver, 1 => use Test Analog in
int epicsStateRequest = argin[1]; //State request from Epics
int iscRequest = argin[2]; // State request from isc
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning ON
double msDelayTurnOn = argin[3];
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning OFF
double msDelayTurnOff =argin[4];
// Cycles to delay before switching digital filters
long cycleDelayTurnOn = msDelayTurnOn * FE_RATE / 1000; //Used when analog filters turning on
long cycleDelayTurnOff = msDelayTurnOff * FE_RATE /1000; //Used when analog filters turning off
//If we're not already changing states, go ahead and check
if (cycleCounter == 0) {
// Epics state 0 => use ISC request
if (epicsStateRequest == 0) {
request = iscRequest;
} else {
request = epicsStateRequest;
// Set an a manual override, so user can control digital filters
// Only affects the mask bits
if (epicsStateRequest < 0) {
mask_user_override = 1;
request = -epicsStateRequest;
}
}
}
//If request is not equal to state, then we are changing states and need to count
if (request != state) {
cycleCounter++;
//We've waited for cycleDelay, now finish the transition to request from state
if ((cycleCounter > cycleDelayTurnOn) && (cycleCounter > cycleDelayTurnOff)) {
cycleCounter = 0;
state = request;
}
}
// Request transitions (handles analog switching)
switch (request) {
case 1: // To STATE 1
analog_control_bits = 0b0; // LP Off (0)
break;
case 2: // To STATE 2
analog_control_bits = 0b1; //LP ON (1)
break;
default: //Default state - everything off
analog_control_bits = 0b0;
break;
}
// If cycleCounter = 0, then we are not changing states
// Base the digital filters choices on the request analog bits (request == state in this case)
if (cycleCounter == 0) {
for (analog_bit=0 ; analog_bit < 1 ; analog_bit++ ) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
}
// Handle the case where were changing states
} else {
// Prior state control bit (used to determine if an analog filter is turning on or off)
switch (state) {
case 1: // To STATE 1
initial_analog_control_bits = 0b0; // LP Off (0)
break;
case 2: // To STATE 2
initial_analog_control_bits = 0b1; //LP ON (1)
break;
default: //Default state - everything off
initial_analog_control_bits = 0b0;
break;
}
// Determine if an analog filter is turning on versus turning off or staying the same
// 1 indicates that case applies (turn on, turn off, or stay the same)
digital_turn_on_mask = (~(initial_analog_control_bits) & analog_control_bits);
digital_stay_the_same_mask = ~(initial_analog_control_bits ^ analog_control_bits);
// Cycle through all the analog bits
// Determine if the analog bits are staying the same
// If so, keep the associated digital filters in the same state
// If the analog bits are turning on, determine if we've waited long enough,
// then change the associated digital filters to the on state. Otherwise, keep them in the off state.
// If the analog bits are turning off, determine if we've waited long enough,
// then change the associated digital filters to the off state. Otherwise, keep them in the on state.
for (analog_bit=0 ; analog_bit < 1 ; analog_bit++ ) {
if (0b1 & (digital_stay_the_same_mask >> analog_bit)) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else if ( 0b1 & (digital_turn_on_mask >> analog_bit)) {
if (cycleCounter > cycleDelayTurnOn) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else {
if (cycleCounter > cycleDelayTurnOff) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
}
}
}
} // Finished with the case where states are changing
//Set digital_mask_bits, used by Filter module to determine which filters are under front end control
//Simple for now - in principle could be made more specific like the above digital control bits and placed
//inside the state transition code
if (mask_user_override == 0) {
digital_mask_bits = 0b0011100111;
} else {
digital_mask_bits = 0b0000000000;
}
//If coil enabled, need to turn 2nd bit on (add 2)
if (coilTestEnable == 1) {
analog_control_bits = analog_control_bits + 2; //Analog filter control bits
}
//Send out the calculated bits
argout[0] = (double) digital_mask_bits;
argout[1] = (double) digital_control_bits;
argout[2] = (double) analog_control_bits;
return;
}
//TACQ_M2 - handles the Mass 2 4 OSEM stage for the HSTS mode cleaner
// Digital Anti AcqOn, Anti AcqOff, Anti Low Pass are always ON
// STATE 1 => Analog Acq OFF, Low Pass OFF
// Digital Sim AcqOff ON, Sim AcqOn OFF, Sim Low Pass ON
// STATE 2 => Analog Acq On, Low Pass OFF
// Digital Sim AcqOff OFF, Sim AcqOn ON, Sim Low Pass ON
// STATE 3 => Analog Acq OFF, Low Pass ON
// Digital Sim AcqOff ON, Sim AcqOn OFF, Sim Low Pass OFF
// STATE 4 => Analog Acq ON, Low Pass ON
// Digital Sim AcqOff OFF, Sim AcqOn ON, Sim Low Pass OFF
//Takes 5 inputs:
//COIL / TEST ENABLE (0 for Coil or 1 for Test)
//EPICS state request (0 hands control to ISC fast request)
//ISC Fast state request
//Turn On Delay (How many ms to wait before switching digital filters when analog filters are turning on)
//Turn Off Delay (How many ms to wait before switching digital filters when analog filters are turning off)
//Provides 3 outputs:
//argout[0] is Mask bit for Filter module
//argout[1] is Control bit for Filter module
//argout[2] is control bits for BO card
// 1st bit (1) (rightmost) is Low Pass On/Off
// 2nd bit (2) is Acquire On/Off
// 3rd bit (4) is Test Coil Enable
void TACQ_M2(double *argin, int nargin, double *argout, int nargout) {
// Analog filter switching delay -> Cycles to wait before sending command to digital filters
static long cycleCounter = 0;
//Last state we finished going to
static int state = 1;
//State we've been requested to go to
static int request = 1;
//initialize control bit variables
int analog_control_bits = 0b0;
int initial_analog_control_bits = 0b0;
int digital_control_bits;
int digital_mask_bits = 0b0;
int digital_turn_on_mask = 0b0;
int digital_stay_the_same_mask = 0b0;
int analog_to_digital_control[2][2];
int mask_user_override = 0;
int analog_bit;
// Set always on digital control bits
digital_control_bits = 0b0001100000;
// Set up digital filter state depending on analog filter state
analog_to_digital_control[1][0] = 0b0000000001; //Analog Acquire filter Off
analog_to_digital_control[1][1] = 0b0000000000; //Analog Acquire filter On
analog_to_digital_control[0][0] = 0b0000000010; //Analog LP filter Off
analog_to_digital_control[0][1] = 0b0000000000; //Analog LP filter On
// Read inputs
int coilTestEnable = argin[0]; //0 => Digital control for Coil driver, 1 => use Test Analog in
int epicsStateRequest = argin[1]; //State request from Epics
int iscRequest = argin[2]; // State request from isc
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning ON
double msDelayTurnOn = argin[3];
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning OFF
double msDelayTurnOff =argin[4];
// Cycles to delay before switching digital filters
long cycleDelayTurnOn = msDelayTurnOn * FE_RATE / 1000; //Used when analog filters turning on
long cycleDelayTurnOff = msDelayTurnOff * FE_RATE /1000; //Used when analog filters turning off
//If we're not already changing states, go ahead and check
if (cycleCounter == 0) {
// Epics state 0 => use ISC request
if (epicsStateRequest == 0) {
request = iscRequest;
} else {
request = epicsStateRequest;
// Set an a manual override, so user can control digital filters
// Only affects the mask bits
if (epicsStateRequest < 0) {
mask_user_override = 1;
request = -epicsStateRequest;
}
}
}
//If request is not equal to state, then we are changing states and need to count
if (request != state) {
cycleCounter++;
//We've waited for cycleDelay, now finish the transition to request from state
if ((cycleCounter > cycleDelayTurnOn) && (cycleCounter > cycleDelayTurnOff)) {
cycleCounter = 0;
state = request;
}
}
// Request transitions (handles analog switching)
switch (request) {
case 1: // To STATE 1
analog_control_bits = 0b00; // LP Off (1st 0), Acq Off (2nd 0)
break;
case 2: // To STATE 2
analog_control_bits = 0b10; //LP Off (1st 0), Acq On (2nd 1)
break;
case 3:
analog_control_bits = 0b01; // LP On (1st 1), Acq Off (2nd 0)
break;
case 4:
analog_control_bits = 0b11; // LP On (1st 1), Acq On (2nd 1)
break;
default: //Default state - everything off
analog_control_bits = 0b00;
break;
}
// If cycleCounter = 0, then we are not changing states
// Base the digital filters choices on the request analog bits (request == state in this case)
if (cycleCounter == 0) {
for (analog_bit=0 ; analog_bit < 2 ; analog_bit++ ) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
}
// Handle the case where were changing states
} else {
// Prior state control bit (used to determine if an analog filter is turning on or off)
switch (state) {
case 1: // To STATE 1
initial_analog_control_bits = 0b00; // LP Off (1st 0), Acq Off (2nd 0)
break;
case 2: // To STATE 2
initial_analog_control_bits = 0b10; //LP Off (1st 0), Acq On (2nd 1)
break;
case 3:
initial_analog_control_bits = 0b01; // LP On (1st 1), Acq Off (2nd 0)
break;
case 4:
initial_analog_control_bits = 0b11; // LP On (1st 1), Acq On (2nd 1)
break;
default: //Default state - everything off
initial_analog_control_bits = 0b00;
break;
}
// Determine if an analog filter is turning on versus turning off or staying the same
// 1 indicates that case applies (turn on, turn off, or stay the same)
digital_turn_on_mask = (~(initial_analog_control_bits) & analog_control_bits);
digital_stay_the_same_mask = ~(initial_analog_control_bits ^ analog_control_bits);
// Cycle through all the analog bits
// Determine if the analog bits are staying the same
// If so, keep the associated digital filters in the same state
// If the analog bits are turning on, determine if we've waited long enough,
// then change the associated digital filters to the on state. Otherwise, keep them in the off state.
// If the analog bits are turning off, determine if we've waited long enough,
// then change the associated digital filters to the off state. Otherwise, keep them in the on state.
for (analog_bit=0 ; analog_bit < 2 ; analog_bit++ ) {
if (0b1 & (digital_stay_the_same_mask >> analog_bit)) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else if ( 0b1 & (digital_turn_on_mask >> analog_bit)) {
if (cycleCounter > cycleDelayTurnOn) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else {
if (cycleCounter > cycleDelayTurnOff) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
}
}
}
} // Finished with the case where states are changingtransition (handles digital filters)
//Set digital_mask_bits, used by Filter module to determine which filters are under front end control
//Simple for now - in principle could be made more specific like the above digital control bits and placed
//inside the state transition code
if (mask_user_override == 0) {
digital_mask_bits = 0b0011100111;
} else {
digital_mask_bits = 0b0000000000;
}
//If coil enabled, need to turn 3rd bit on (add 4)
if (coilTestEnable == 1) {
analog_control_bits = analog_control_bits + 4; //Analog filter control bits
}
//Send out the calculated bits
argout[0] = (double) digital_mask_bits;
argout[1] = (double) digital_control_bits;
argout[2] = (double) analog_control_bits;
return;
}
void TACQ(double *argin, int nargin, double *argout, int nargout) {
// Analog filter switching delay -> Cycles to wait before sending command to digital filters
static long cycleCounter = 0;
//Last state we finished going to
static int state = 1;
//State we've been requested to go to
static int request = 1;
//initialize control bit variables
int analog_control_bits = 0b0;
int initial_analog_control_bits = 0b0;
int digital_control_bits;
int digital_mask_bits = 0b0;
int digital_turn_on_mask = 0b0;
int digital_stay_the_same_mask = 0b0;
int analog_to_digital_control[2][2];
int mask_user_override = 0;
int analog_bit;
// Set always on digital control bits
digital_control_bits = 0b0011100000;
// Set up digital filter state depending on analog filter state
analog_to_digital_control[1][0] = 0b0000000010; //Analog Acquire filter Off
analog_to_digital_control[1][1] = 0b0000000001; //Analog Acquire filter On
analog_to_digital_control[0][0] = 0b0000000100; //Analog LP filter Off
analog_to_digital_control[0][1] = 0b0000000000; //Analog LP filter On
// Read inputs
int coilTestEnable = argin[0]; //0 => Digital control for Coil driver, 1 => use Test Analog in
int epicsStateRequest = argin[1]; //State request from Epics
int iscRequest = argin[2]; // State request from isc
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning ON
double msDelayTurnOn = argin[3];
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning OFF
double msDelayTurnOff =argin[4];
// Cycles to delay before switching digital filters
long cycleDelayTurnOn = msDelayTurnOn * FE_RATE / 1000; //Used when analog filters turning on
long cycleDelayTurnOff = msDelayTurnOff * FE_RATE /1000; //Used when analog filters turning off
//If we're not already changing states, go ahead and check
if (cycleCounter == 0) {
// Epics state 0 => use ISC request
if (epicsStateRequest == 0) {
request = iscRequest;
} else {
request = epicsStateRequest;
// Set an a manual override, so user can control digital filters
// Only affects the mask bits
if (epicsStateRequest < 0) {
mask_user_override = 1;
request = -epicsStateRequest;
}
}
}
//If request is not equal to state, then we are changing states and need to count
if (request != state) {
cycleCounter++;
//We've waited for cycleDelay, now finish the transition to request from state
if ((cycleCounter > cycleDelayTurnOn) && (cycleCounter > cycleDelayTurnOff)) {
cycleCounter = 0;
state = request;
}
}
// Request transitions (handles analog switching)
switch (request) {
case 1: // To STATE 1
analog_control_bits = 0b00; // LP Off (1st 0), Acq Off (2nd 0)
break;
case 2: // To STATE 2
analog_control_bits = 0b10; //LP Off (1st 0), Acq On (2nd 1)
break;
case 3:
analog_control_bits = 0b01; // LP On (1st 1), Acq Off (2nd 0)
break;
case 4:
analog_control_bits = 0b11; // LP On (1st 1), Acq On (2nd 1)
break;
default: //Default state - everything off
analog_control_bits = 0b00;
break;
}
// If cycleCounter = 0, then we are not changing states
// Base the digital filters choices on the request analog bits (request == state in this case)
if (cycleCounter == 0) {
for (analog_bit=0 ; analog_bit < 2 ; analog_bit++ ) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
}
// Handle the case where were changing states
} else {
// Prior state control bit (used to determine if an analog filter is turning on or off)
switch (state) {
case 1: // To STATE 1
initial_analog_control_bits = 0b00; // LP Off (1st 0), Acq Off (2nd 0)
break;
case 2: // To STATE 2
initial_analog_control_bits = 0b10; //LP Off (1st 0), Acq On (2nd 1)
break;
case 3:
initial_analog_control_bits = 0b01; // LP On (1st 1), Acq Off (2nd 0)
break;
case 4:
initial_analog_control_bits = 0b11; // LP On (1st 1), Acq On (2nd 1)
break;
default: //Default state - everything off
initial_analog_control_bits = 0b00;
break;
}
// Determine if an analog filter is turning on versus turning off or staying the same
// 1 indicates that case applies (turn on, turn off, or stay the same)
digital_turn_on_mask = (~(initial_analog_control_bits) & analog_control_bits);
digital_stay_the_same_mask = ~(initial_analog_control_bits ^ analog_control_bits);
// Cycle through all the analog bits
// Determine if the analog bits are staying the same
// If so, keep the associated digital filters in the same state
// If the analog bits are turning on, determine if we've waited long enough,
// then change the associated digital filters to the on state. Otherwise, keep them in the off state.
// If the analog bits are turning off, determine if we've waited long enough,
// then change the associated digital filters to the off state. Otherwise, keep them in the on state.
for (analog_bit=0 ; analog_bit < 2 ; analog_bit++ ) {
if (0b1 & (digital_stay_the_same_mask >> analog_bit)) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else if ( 0b1 & (digital_turn_on_mask >> analog_bit)) {
if (cycleCounter > cycleDelayTurnOn) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else {
if (cycleCounter > cycleDelayTurnOff) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
}
}
}
} // Finished with the case where states are changingtransition (handles digital filters)
//Set digital_mask_bits, used by Filter module to determine which filters are under front end control
//Simple for now - in principle could be made more specific like the above digital control bits and placed
//inside the state transition code
if (mask_user_override == 0) {
digital_mask_bits = 0b0011100111;
} else {
digital_mask_bits = 0b0000000000;
}
//If coil enabled, need to turn 3rd bit on (add 4)
if (coilTestEnable == 1) {
analog_control_bits = analog_control_bits + 4; //Analog filter control bits
}
//Send out the calculated bits
argout[0] = (double) digital_mask_bits;
argout[1] = (double) digital_control_bits;
argout[2] = (double) analog_control_bits;
return;
}
// UIM - handles the 4 OSEM Upper Intermediate Mass stages for QUADs
// Digital Anti Acq, Anti LP1, Anti LP2, Anti LP3 are always ON
// STATE 1 => Analog LP1 OFF, LP2 OFF, LP3 OFF
// Digital Sim LP1 ON, Sim LP2 ON, Sim LP3 ON
// STATE 2 => Analog LP1 ON, LP2 OFF, LP3 OFF
// Digital Sim LP1 OFF, Sim LP2 ON, Sim LP3 ON
// STATE 3 => Analog LP1 ON, LP2 ON, LP3 OFF
// Digital Sim LP1 OFF, Sim LP2 OFF, Sim LP3 ON
// STATE 4 => Analog LP1 ON, LP2 ON, LP3 ON
// Digital Sim LP1 OFF, Sim LP2 OFF, Sim LP3 OFF
//Takes 4 inputs:
//COIL / TEST ENABLE (0 for Coil or 1 for Test)
//EPICS state request (0 hands control to ISC fast request)
//ISC Fast state request
//Turn On Delay (How many ms to wait before switching digital filters when analog filters are turning on)
//Turn Off Delay (How many ms to wait before switching digital filters when analog filters are turning off)
//Provides 3 outputs:
//argout[0] is Mask bit for Filter module
//argout[1] is Control bit for Filter module
//argout[2] is control bits for BO card
// 1st bit (1) (rightmost) is Low Pass 1 On/Off
// 2nd bit (2) is Low Pass 2 On/Off
// 3rd bit (4) is Low Pass 3 On/Off
// 4th bit (8) is Test Coil Enable
void UIM(double *argin, int nargin, double *argout, int nargout) {
// Analog filter switching delay -> Cycles to wait before sending command to digital filters
static long cycleCounter = 0;
//Last state we finished going to
static int state = 1;
//State we've been requested to go to
static int request = 1;
//initialize control bit variables
int analog_control_bits = 0b0;
int initial_analog_control_bits = 0b0;
int digital_control_bits;
int digital_mask_bits = 0b0;
int digital_turn_on_mask = 0b0;
int digital_stay_the_same_mask = 0b0;
int analog_to_digital_control[3][2];
int mask_user_override = 0;
int analog_bit;
// Set always on digital control bits
digital_control_bits = 0b0111100000;
// Set up digital filter state depending on analog filter state
analog_to_digital_control[2][0] = 0b0000001000; //Analog LP1 filter Off
analog_to_digital_control[2][1] = 0b0000000000; //Analog LP1 filter On
analog_to_digital_control[1][0] = 0b0000000100; //Analog LP2 filter Off
analog_to_digital_control[1][1] = 0b0000000000; //Analog LP2 filter On
analog_to_digital_control[0][0] = 0b0000000010; //Analog LP3 filter Off
analog_to_digital_control[0][1] = 0b0000000000; //Analog LP3 filter On
// Read inputs
int coilTestEnable = argin[0]; //0 => Digital control for Coil driver, 1 => use Test Analog in
int epicsStateRequest = argin[1]; //State request from Epics
int iscRequest = argin[2]; // State request from isc
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning ON
double msDelayTurnOn = argin[3];
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning OFF
double msDelayTurnOff =argin[4];
// Cycles to delay before switching digital filters
long cycleDelayTurnOn = msDelayTurnOn * FE_RATE / 1000; //Used when analog filters turning on
long cycleDelayTurnOff = msDelayTurnOff * FE_RATE /1000; //Used when analog filters turning off
//If we're not already changing states, go ahead and check
if (cycleCounter == 0) {
// Epics state 0 => use ISC request
if (epicsStateRequest == 0) {
request = iscRequest;
} else {
request = epicsStateRequest;
// Set an a manual override, so user can control digital filters
// Only affects the mask bits
if (epicsStateRequest < 0) {
mask_user_override = 1;
request = -epicsStateRequest;
}
}
}
//If request is not equal to state, then we are changing states and need to count
if (request != state) {
cycleCounter++;
//We've waited for cycleDelay, now finish the transition to request from state
if ((cycleCounter > cycleDelayTurnOn) && (cycleCounter > cycleDelayTurnOff)) {
cycleCounter = 0;
state = request;
}
}
// Request transitions (handles analog switching)
switch (request) {
case 1: // To STATE 1
analog_control_bits = 0b000; // LP1 Off (0), LP2 Off (0), LP3 Off (0)
break;
case 2: // To STATE 2
analog_control_bits = 0b001; // LP1 On (1), LP2 Off (0), LP3 Off (0)
break;
case 3:
analog_control_bits = 0b011; // LP1 On (1), LP2 On (1), LP3 Off (0)
break;
case 4:
analog_control_bits = 0b111; // LP1 On (1), LP2 On (1), LP3 On (1)
break;
default: //Default state - everything off
analog_control_bits = 0b000;
break;
}
// If cycleCounter = 0, then we are not changing states
// Base the digital filters choices on the request analog bits (request == state in this case)
if (cycleCounter == 0) {
for (analog_bit=0 ; analog_bit < 3 ; analog_bit++ ) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
}
// Handle the case where were changing states
} else {
// Prior state control bit (used to determine if an analog filter is turning on or off)
switch (state) {
case 1: // To STATE 1
initial_analog_control_bits = 0b000; // LP1 Off (0), LP2 Off (0), LP3 Off (0)
break;
case 2: // To STATE 2
initial_analog_control_bits = 0b001; // LP1 On (1), LP2 Off (0), LP3 Off (0)
break;
case 3:
initial_analog_control_bits = 0b011; // LP1 On (1), LP2 On (1), LP3 Off (0)
break;
case 4:
initial_analog_control_bits = 0b111; // LP1 On (1), LP2 On (1), LP3 On (1)
break;
default: //Default state - everything off
initial_analog_control_bits = 0b000;
break;
}
// Determine if an analog filter is turning on versus turning off or staying the same
// 1 indicates that case applies (turn on, turn off, or stay the same)
digital_turn_on_mask = (~(initial_analog_control_bits) & analog_control_bits);
digital_stay_the_same_mask = ~(initial_analog_control_bits ^ analog_control_bits);
// Cycle through all the analog bits
// Determine if the analog bits are staying the same
// If so, keep the associated digital filters in the same state
// If the analog bits are turning on, determine if we've waited long enough,
// then change the associated digital filters to the on state. Otherwise, keep them in the off state.
// If the analog bits are turning off, determine if we've waited long enough,
// then change the associated digital filters to the off state. Otherwise, keep them in the on state.
for (analog_bit=0 ; analog_bit < 3 ; analog_bit++ ) {
if (0b1 & (digital_stay_the_same_mask >> analog_bit)) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else if ( 0b1 & (digital_turn_on_mask >> analog_bit)) {
if (cycleCounter > cycleDelayTurnOn) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else {
if (cycleCounter > cycleDelayTurnOff) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
}
}
}
} // Finished with the case where states are changing
//Set digital_mask_bits, used by Filter module to determine which filters are under front end control
//Simple for now - in principle could be made more specific like the above digital control bits and placed
//inside the state transition code
if (mask_user_override == 0) {
digital_mask_bits = 0b0111101111;
} else {
digital_mask_bits = 0b0000000000;
}
//If coil enabled, need to turn 4th bit on (add 8)
if (coilTestEnable == 1) {
analog_control_bits = analog_control_bits + 8; //Analog filter control bits
}
//Send out the calculated bits
argout[0] = (double) digital_mask_bits;
argout[1] = (double) digital_control_bits;
argout[2] = (double) analog_control_bits;
return;
}
//SINGLE - handles the 4 OSEM top stage
// Digital Anti Acq, Anti Low Pass are always ON
// STATE 1 => Analog Low Pass OFF
// Sim Low Pass ON
// STATE 2 => Analog Low Pass OFF
// Sim Low Pass OFF
//Takes 4 inputs:
//COIL / TEST ENABLE (0 for Coil or 1 for Test)
//EPICS state request (0 hands control to ISC fast request)
//ISC Fast state request0
//Turn On Delay (How many ms to wait before switching digital filters when analog filters are turning on)
//Turn Off Delay (How many ms to wait before switching digital filters when analog filters are turning off)
//Provides 3 outputs:
//argout[0] is Mask bit for Filter module
//argout[1] is Control bit for Filter module
//argout[2] is control bits for BO card
// 1st bit (1) (rightmost) is Low Pass On/Off
// 2nd bit (2) is Test Coil Enable
void SINGLE(double *argin, int nargin, double *argout, int nargout) {
// Analog filter switching delay -> Cycles to wait before sending command to digital filters
static long cycleCounter = 0;
//Last state we finished going to
static int state = 1;
//State we've been requested to go to
static int request = 1;
//initialize control bit variables
int analog_control_bits = 0b0;
int initial_analog_control_bits = 0b0;
int digital_control_bits;
int digital_mask_bits = 0b0;
int digital_turn_on_mask = 0b0;
int digital_stay_the_same_mask = 0b0;
int analog_to_digital_control[1][2];
int mask_user_override = 0;
int analog_bit;
// Set always on digital control bits
digital_control_bits = 0b0000100000;
// Set up digital filter state depending on analog filter state
analog_to_digital_control[0][0] = 0b0000000001; //Analog LP filter Off
analog_to_digital_control[0][1] = 0b0000000000; //Analog LP filter On
// Read inputs
int coilTestEnable = argin[0]; //0 => Digital control for Coil driver, 1 => use Test Analog in
int epicsStateRequest = argin[1]; //State request from Epics
int iscRequest = argin[2]; // State request from isc
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning ON
double msDelayTurnOn = argin[3];
// Epics input indicating how long to delay digital filter switching in ms when Analog filters are turning OFF
double msDelayTurnOff =argin[4];
// Cycles to delay before switching digital filters
long cycleDelayTurnOn = msDelayTurnOn * FE_RATE / 1000; //Used when analog filters turning on
long cycleDelayTurnOff = msDelayTurnOff * FE_RATE /1000; //Used when analog filters turning off
//If we're not already changing states, go ahead and check
if (cycleCounter == 0) {
// Epics state 0 => use ISC request
if (epicsStateRequest == 0) {
request = iscRequest;
} else {
request = epicsStateRequest;
// Set an a manual override, so user can control digital filters
// Only affects the mask bits
if (epicsStateRequest < 0) {
mask_user_override = 1;
request = -epicsStateRequest;
}
}
}
//If request is not equal to state, then we are changing states and need to count
if (request != state) {
cycleCounter++;
//We've waited for cycleDelay, now finish the transition to request from state
if ((cycleCounter > cycleDelayTurnOn) && (cycleCounter > cycleDelayTurnOff)) {
cycleCounter = 0;
state = request;
}
}
// Request transitions (handles analog switching)
switch (request) {
case 1: // To STATE 1
analog_control_bits = 0b0; // LP Off (0)
break;
case 2: // To STATE 2
analog_control_bits = 0b1; //LP ON (1)
break;
default: //Default state - everything off
analog_control_bits = 0b0;
break;
}
// If cycleCounter = 0, then we are not changing states
// Base the digital filters choices on the request analog bits (request == state in this case)
if (cycleCounter == 0) {
for (analog_bit=0 ; analog_bit < 1 ; analog_bit++ ) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
}
// Handle the case where were changing states
} else {
// Prior state control bit (used to determine if an analog filter is turning on or off)
switch (state) {
case 1: // To STATE 1
initial_analog_control_bits = 0b0; // LP Off (0)
break;
case 2: // To STATE 2
initial_analog_control_bits = 0b1; //LP ON (1)
break;
default: //Default state - everything off
initial_analog_control_bits = 0b0;
break;
}
// Determine if an analog filter is turning on versus turning off or staying the same
// 1 indicates that case applies (turn on, turn off, or stay the same)
digital_turn_on_mask = (~(initial_analog_control_bits) & analog_control_bits);
digital_stay_the_same_mask = ~(initial_analog_control_bits ^ analog_control_bits);
// Cycle through all the analog bits
// Determine if the analog bits are staying the same
// If so, keep the associated digital filters in the same state
// If the analog bits are turning on, determine if we've waited long enough,
// then change the associated digital filters to the on state. Otherwise, keep them in the off state.
// If the analog bits are turning off, determine if we've waited long enough,
// then change the associated digital filters to the off state. Otherwise, keep them in the on state.
for (analog_bit=0 ; analog_bit < 1 ; analog_bit++ ) {
if (0b1 & (digital_stay_the_same_mask >> analog_bit)) {
if (0b1 & (analog_control_bits >> analog_bit)) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else if ( 0b1 & (digital_turn_on_mask >> analog_bit)) {
if (cycleCounter > cycleDelayTurnOn) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
}
} else {
if (cycleCounter > cycleDelayTurnOff) {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][0];
} else {
digital_control_bits = digital_control_bits | analog_to_digital_control[analog_bit][1];
}
}
}
} // Finished with the case where states are changing
//Set digital_mask_bits, used by Filter module to determine which filters are under front end control
//Simple for now - in principle could be made more specific like the above digital control bits and placed
//inside the state transition code
if (mask_user_override == 0) {
digital_mask_bits = 0b0000100001;
} else {
digital_mask_bits = 0b0000000000;
}
//If coil enabled, need to turn 2nd bit on (add 2)
if (coilTestEnable == 1) {
analog_control_bits = analog_control_bits + 2; //Analog filter control bits
}
//Send out the calculated bits
argout[0] = (double) digital_mask_bits;
argout[1] = (double) digital_control_bits;
argout[2] = (double) analog_control_bits;
return;
}
simulink_archive/simLink/CHK_DIO.mdl 0 → 100644
View file @ 81d2c40c
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simulink_archive/simLink/Copy_of_k1c00.mdl 0 → 100644
View file @ 81d2c40c
Model {
Name "k1c00"
Version 8.2
MdlSubVersion 0
SavedCharacterEncoding "UTF-8"
GraphicalInterface {
NumRootInports 0
NumRootOutports 0
ParameterArgumentNames ""
ComputedModelVersion "1.641"
NumModelReferences 0
NumTestPointedSignals 0
}
SaveDefaultBlockParams on
ScopeRefreshTime 0.035000
OverrideScopeRefreshTime on
DisableAllScopes off
DataTypeOverride "UseLocalSettings"
DataTypeOverrideAppliesTo "AllNumericTypes"
MinMaxOverflowLogging "UseLocalSettings"
MinMaxOverflowArchiveMode "Overwrite"
FPTRunName "Run 1"
MaxMDLFileLineLength 120
Object {
$PropName "BdWindowsInfo"
$ObjectID 1
$ClassName "Simulink.BDWindowsInfo"
Object {
$PropName "WindowsInfo"
$ObjectID 2
$ClassName "Simulink.WindowInfo"
IsActive [1]
Location [694.0, 20.0, 1875.0, 1036.0]
Object {
$PropName "ModelBrowserInfo"
$ObjectID 3
$ClassName "Simulink.ModelBrowserInfo"
Visible [0]
DockPosition "Left"
Width [50]
Height [50]
Filter [9]
}
Object {
$PropName "ExplorerBarInfo"
$ObjectID 4
$ClassName "Simulink.ExplorerBarInfo"
Visible [0]
}
Object {
$PropName "EditorsInfo"
$ObjectID 5
$ClassName "Simulink.EditorInfo"
IsActive [1]
ViewObjType "SimulinkTopLevel"
LoadSaveID "0"
Extents [1819.0, 866.0]
ZoomFactor [1.25]
Offset [873.33502017967567, 725.63729117124922]
}
}
}
Created "Tue Apr 14 12:28:19 2009"
Creator "controls"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "controls"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Tue May 03 15:53:05 2022"
RTWModifiedTimeStamp 573493982
ModelVersionFormat "1.%<AutoIncrement:641>"
ConfigurationManager "none"
SampleTimeColors off
SampleTimeAnnotations off
LibraryLinkDisplay "all"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowDesignRanges off
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
ShowTestPointIcons on
ShowSignalResolutionIcons on
ShowViewerIcons on
SortedOrder off
ExecutionContextIcon off
ShowLinearizationAnnotations on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
SimulationMode "normal"
PauseTimes "5"
NumberOfSteps 1
SnapshotBufferSize 10
SnapshotInterval 10
NumberOfLastSnapshots 0
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
Object {
$PropName "DataLoggingOverride"
$ObjectID 6
$ClassName "Simulink.SimulationData.ModelLoggingInfo"
model_ "k1c00"
Array {
Type "Cell"
Dimension 1
Cell "k1c00"
PropName "logAsSpecifiedByModels_"
}
Array {
Type "Cell"
Dimension 1
Cell ""
PropName "logAsSpecifiedByModelsSSIDs_"
}
}
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
CovForceBlockReductionOff on
CovEnableCumulative on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeVarName "covCumulativeData"
CovCumulativeReport off
CovReportOnPause on
CovModelRefEnable "Off"
CovExternalEMLEnable off
ExtModeBatchMode off
ExtModeEnableFloating on
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigDurationFloating "auto"
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
BufferReuse on
ShowModelReferenceBlockVersion off
ShowModelReferenceBlockIO off
Array {
Type "Handle"
Dimension 1
Simulink.ConfigSet {
$ObjectID 7
Version "1.13.1"
Array {
Type "Handle"
Dimension 8
Simulink.SolverCC {
$ObjectID 8
Version "1.13.1"
StartTime "0.0"
StopTime "10.0"
AbsTol "auto"
FixedStep "auto"
InitialStep "auto"
MaxNumMinSteps "-1"
MaxOrder 5
ZcThreshold "auto"
ConsecutiveZCsStepRelTol "10*128*eps"
MaxConsecutiveZCs "1000"
ExtrapolationOrder 4
NumberNewtonIterations 1
MaxStep "auto"
MinStep "auto"
MaxConsecutiveMinStep "1"
RelTol "1e-3"
SolverMode "Auto"
EnableConcurrentExecution off
ConcurrentTasks off
Solver "ode45"
SolverName "ode45"
SolverJacobianMethodControl "auto"
ShapePreserveControl "DisableAll"
ZeroCrossControl "UseLocalSettings"
ZeroCrossAlgorithm "Nonadaptive"
AlgebraicLoopSolver "TrustRegion"
SolverResetMethod "Fast"
PositivePriorityOrder off
AutoInsertRateTranBlk off
SampleTimeConstraint "Unconstrained"
InsertRTBMode "Whenever possible"
}
Simulink.DataIOCC {
$ObjectID 9
Version "1.13.1"
Decimation "1"
ExternalInput "[t, u]"
FinalStateName "xFinal"
InitialState "xInitial"
LimitDataPoints on
MaxDataPoints "1000"
LoadExternalInput off
LoadInitialState off
SaveFinalState off
SaveCompleteFinalSimState off
SaveFormat "Array"
SignalLoggingSaveFormat "ModelDataLogs"
SaveOutput on
SaveState off
SignalLogging on
DSMLogging on
InspectSignalLogs off
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName "xout"
TimeSaveName "tout"
OutputSaveName "yout"
SignalLoggingName "logsout"
DSMLoggingName "dsmout"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
ReturnWorkspaceOutputsName "out"
Refine "1"
}
Simulink.OptimizationCC {
$ObjectID 10
Version "1.13.1"
Array {
Type "Cell"
Dimension 4
Cell "ZeroExternalMemoryAtStartup"
Cell "ZeroInternalMemoryAtStartup"
Cell "NoFixptDivByZeroProtection"
Cell "OptimizeModelRefInitCode"
PropName "DisabledProps"
}
BlockReduction on
BooleanDataType on
ConditionallyExecuteInputs on
InlineParams off
UseIntDivNetSlope off
UseFloatMulNetSlope off
DefaultUnderspecifiedDataType "double"
UseSpecifiedMinMax off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
EnhancedBackFolding off
StrengthReduction off
ExpressionFolding on
BooleansAsBitfields off
BitfieldContainerType "uint_T"
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs "Structure reference"
ExpressionDepthLimit 2147483647
FoldNonRolledExpr on
LocalBlockOutputs on
RollThreshold 5
SystemCodeInlineAuto off
StateBitsets off
DataBitsets off
ActiveStateOutputEnumStorageType "Native Integer"
UseTempVars off
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero on
NoFixptDivByZeroProtection off
EfficientFloat2IntCast off
EfficientMapNaN2IntZero on
OptimizeModelRefInitCode off
LifeSpan "inf"
MaxStackSize "Inherit from target"
BufferReusableBoundary on
SimCompilerOptimization "Off"
AccelVerboseBuild off
ParallelExecutionInRapidAccelerator on
}
Simulink.DebuggingCC {
$ObjectID 11
Version "1.13.1"
RTPrefix "error"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
SignalInfNanChecking "none"
SignalRangeChecking "none"
ReadBeforeWriteMsg "UseLocalSettings"
WriteAfterWriteMsg "UseLocalSettings"
WriteAfterReadMsg "UseLocalSettings"
AlgebraicLoopMsg "warning"
ArtificialAlgebraicLoopMsg "warning"
SaveWithDisabledLinksMsg "warning"
SaveWithParameterizedLinksMsg "warning"
CheckSSInitialOutputMsg on
UnderspecifiedInitializationDetection "Classic"
MergeDetectMultiDrivingBlocksExec "none"
CheckExecutionContextPreStartOutputMsg off
CheckExecutionContextRuntimeOutputMsg off
SignalResolutionControl "UseLocalSettings"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
TimeAdjustmentMsg "none"
MaxConsecutiveZCsMsg "error"
MaskedZcDiagnostic "warning"
IgnoredZcDiagnostic "warning"
SolverPrmCheckMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskDSMMsg "error"
MultiTaskCondExecSysMsg "error"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
TasksWithSamePriorityMsg "warning"
SigSpecEnsureSampleTimeMsg "warning"
CheckMatrixSingularityMsg "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterUnderflowMsg "none"
ParameterPrecisionLossMsg "warning"
ParameterTunabilityLossMsg "warning"
FixptConstUnderflowMsg "none"
FixptConstOverflowMsg "none"
FixptConstPrecisionLossMsg "none"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
FcnCallInpInsideContextMsg "UseLocalSettings"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SFcnCompatibilityMsg "none"
FrameProcessingCompatibilityMsg "warning"
UniqueDataStoreMsg "none"
BusObjectLabelMismatch "warning"
RootOutportRequireBusObject "warning"
AssertControl "UseLocalSettings"
EnableOverflowDetection off
ModelReferenceIOMsg "none"
ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"
ModelReferenceVersionMismatchMessage "none"
ModelReferenceIOMismatchMessage "none"
ModelReferenceCSMismatchMessage "none"
UnknownTsInhSupMsg "warning"
ModelReferenceDataLoggingMessage "warning"
ModelReferenceSymbolNameMessage "warning"
ModelReferenceExtraNoncontSigs "error"
StateNameClashWarn "warning"
SimStateInterfaceChecksumMismatchMsg "warning"
SimStateOlderReleaseMsg "error"
InitInArrayFormatMsg "warning"
StrictBusMsg "Warning"
BusNameAdapt "WarnAndRepair"
NonBusSignalsTreatedAsBus "none"
LoggingUnavailableSignals "error"
BlockIODiagnostic "none"
SFUnusedDataAndEventsDiag "warning"
SFUnexpectedBacktrackingDiag "warning"
SFInvalidInputDataAccessInChartInitDiag "warning"
SFNoUnconditionalDefaultTransitionDiag "warning"
SFTransitionOutsideNaturalParentDiag "warning"
SFUnconditionalTransitionShadowingDiag "warning"
SFUndirectedBroadcastEventsDiag "warning"
SFTransitionActionBeforeConditionDiag "warning"
}
Simulink.HardwareCC {
$ObjectID 12
Version "1.13.1"
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
ProdBitPerLongLong 64
ProdBitPerFloat 32
ProdBitPerDouble 64
ProdBitPerPointer 32
ProdLargestAtomicInteger "Char"
ProdLargestAtomicFloat "None"
ProdIntDivRoundTo "Undefined"
ProdEndianess "Unspecified"
ProdWordSize 32
ProdShiftRightIntArith on
ProdLongLongMode off
ProdHWDeviceType "32-bit Generic"
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
TargetBitPerLongLong 64
TargetBitPerFloat 32
TargetBitPerDouble 64
TargetBitPerPointer 32
TargetLargestAtomicInteger "Char"
TargetLargestAtomicFloat "None"
TargetShiftRightIntArith on
TargetLongLongMode off
TargetIntDivRoundTo "Undefined"
TargetEndianess "Unspecified"
TargetWordSize 32
TargetTypeEmulationWarnSuppressLevel 0
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType "Specified"
TargetUnknown off
ProdEqTarget on
}
Simulink.ModelReferenceCC {
$ObjectID 13
Version "1.13.1"
UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
CheckModelReferenceTargetMessage "error"
EnableParallelModelReferenceBuilds off
ParallelModelReferenceErrorOnInvalidPool on
ParallelModelReferenceMATLABWorkerInit "None"
ModelReferenceNumInstancesAllowed "Multi"
PropagateVarSize "Infer from blocks in model"
ModelReferencePassRootInputsByReference on
ModelReferenceMinAlgLoopOccurrences off
PropagateSignalLabelsOutOfModel off
SupportModelReferenceSimTargetCustomCode off
}
Simulink.SFSimCC {
$ObjectID 14
Version "1.13.1"
SFSimEnableDebug on
SFSimOverflowDetection on
SFSimEcho on
SimBlas on
SimCtrlC on
SimExtrinsic on
SimIntegrity on
SimUseLocalCustomCode off
SimParseCustomCode on
SimBuildMode "sf_incremental_build"
SimGenImportedTypeDefs off
}
Simulink.RTWCC {
$BackupClass "Simulink.RTWCC"
$ObjectID 15
Version "1.13.1"
Array {
Type "Cell"
Dimension 6
Cell "IncludeHyperlinkInReport"
Cell "GenerateTraceInfo"
Cell "GenerateTraceReport"
Cell "GenerateTraceReportSl"
Cell "GenerateTraceReportSf"
Cell "GenerateTraceReportEml"
PropName "DisabledProps"
}
SystemTargetFile "grt.tlc"
TLCOptions ""
GenCodeOnly off
MakeCommand "make_rtw"
GenerateMakefile on
PackageGeneratedCodeAndArtifacts off
PackageName ""
TemplateMakefile "grt_default_tmf"
PostCodeGenCommand ""
Description ""
GenerateReport off
SaveLog off
RTWVerbose on
RetainRTWFile off
ProfileTLC off
TLCDebug off
TLCCoverage off
TLCAssert off
ProcessScriptMode "Default"
ConfigurationMode "Optimized"
ProcessScript ""
ConfigurationScript ""
ConfigAtBuild off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
CustomSourceCode ""
CustomHeaderCode ""
CustomInclude ""
CustomSource ""
CustomLibrary ""
CustomInitializer ""
CustomTerminator ""
Toolchain "Automatically locate an installed toolchain"
BuildConfiguration "Faster Builds"
IncludeHyperlinkInReport off
LaunchReport off
PortableWordSizes off
GenerateErtSFunction off
CreateSILPILBlock "None"
CodeExecutionProfiling off
CodeExecutionProfileVariable "executionProfile"
CodeProfilingSaveOptions "SummaryOnly"
CodeProfilingInstrumentation off
SILDebugging off
TargetLang "C"
IncludeBusHierarchyInRTWFileBlockHierarchyMap off
IncludeERTFirstTime off
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml off
GenerateCodeInfo off
GenerateWebview off
GenerateCodeMetricsReport off
GenerateCodeReplacementReport off
RTWCompilerOptimization "Off"
RTWCustomCompilerOptimizations ""
CheckMdlBeforeBuild "Off"
CustomRebuildMode "OnUpdate"
DataInitializer ""
SharedConstantsCachingThreshold 1024
Array {
Type "Handle"
Dimension 2
Simulink.CodeAppCC {
$ObjectID 16
Version "1.13.1"
Array {
Type "Cell"
Dimension 16
Cell "IgnoreCustomStorageClasses"
Cell "InsertBlockDesc"
Cell "SFDataObjDesc"
Cell "SimulinkDataObjDesc"
Cell "DefineNamingRule"
Cell "SignalNamingRule"
Cell "ParamNamingRule"
Cell "InlinedPrmAccess"
Cell "CustomSymbolStr"
Cell "CustomSymbolStrGlobalVar"
Cell "CustomSymbolStrType"
Cell "CustomSymbolStrField"
Cell "CustomSymbolStrFcn"
Cell "CustomSymbolStrBlkIO"
Cell "CustomSymbolStrTmpVar"
Cell "CustomSymbolStrMacro"
PropName "DisabledProps"
}
ForceParamTrailComments off
GenerateComments on
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
MaxIdLength 31
PreserveName off
PreserveNameWithParent off
ShowEliminatedStatement off
OperatorAnnotations off
IncAutoGenComments off
SimulinkDataObjDesc off
SFDataObjDesc off
MATLABFcnDesc off
IncDataTypeInIds off
MangleLength 1
CustomSymbolStrGlobalVar "$R$N$M"
CustomSymbolStrType "$N$R$M_T"
CustomSymbolStrField "$N$M"
CustomSymbolStrFcn "$R$N$M$F"
CustomSymbolStrFcnArg "rt$I$N$M"
CustomSymbolStrBlkIO "rtb_$N$M"
CustomSymbolStrTmpVar "$N$M"
CustomSymbolStrMacro "$R$N$M"
CustomSymbolStrUtil "$N$C"
DefineNamingRule "None"
ParamNamingRule "None"
SignalNamingRule "None"
InsertBlockDesc off
InsertPolySpaceComments off
SimulinkBlockComments on
MATLABSourceComments off
EnableCustomComments off
InternalIdentifier "Shortened"
InlinedPrmAccess "Literals"
ReqsInCode off
UseSimReservedNames off
}
Simulink.GRTTargetCC {
$BackupClass "Simulink.TargetCC"
$ObjectID 17
Version "1.13.1"
Array {
Type "Cell"
Dimension 15
Cell "IncludeMdlTerminateFcn"
Cell "CombineOutputUpdateFcns"
Cell "SuppressErrorStatus"
Cell "ERTCustomFileBanners"
Cell "GenerateSampleERTMain"
Cell "GenerateTestInterfaces"
Cell "ModelStepFunctionPrototypeControlCompliant"
Cell "CPPClassGenCompliant"
Cell "SupportNonInlinedSFcns"
Cell "PurelyIntegerCode"
Cell "PortableWordSizes"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
Cell "GenerateAllocFcn"
PropName "DisabledProps"
}
TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
CodeReplacementLibrary "ANSI_C"
UtilityFuncGeneration "Auto"
ERTMultiwordTypeDef "System defined"
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
ConcurrentExecutionCompliant on
IncludeMdlTerminateFcn on
GeneratePreprocessorConditionals "Disable all"
CombineOutputUpdateFcns off
CombineSignalStateStructs off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
EnableShiftOperators on
ParenthesesLevel "Nominal"
MATLABClassNameForMDSCustomization "Simulink.SoftwareTarget.GRTCustomization"
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant off
AutosarCompliant off
GRTInterface on
GenerateAllocFcn off
UseMalloc off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
RTWCAPIRootIO off
GenerateASAP2 off
}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
ConfigPrmDlgPosition [ 2, 27, 882, 657 ]
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 7
}
Object {
$PropName "DataTransfer"
$ObjectID 18
$ClassName "Simulink.GlobalDataTransfer"
DefaultTransitionBetweenSyncTasks "Ensure deterministic transfer (maximum delay)"
DefaultTransitionBetweenAsyncTasks "Ensure data integrity only"
DefaultTransitionBetweenContTasks "Ensure deterministic transfer (minimum delay)"
DefaultExtrapolationMethodBetweenContTasks "None"
AutoInsertRateTranBlk [0]
}
ExplicitPartitioning off
BlockDefaults {
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
BlockRotation 0
BlockMirror off
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
MaskDefaults {
SelfModifiable "off"
IconFrame "on"
IconOpaque "on"
RunInitForIconRedraw "off"
IconRotate "none"
PortRotate "default"
IconUnits "autoscale"
}
MaskParameterDefaults {
Evaluate "on"
Tunable "on"
NeverSave "off"
Internal "off"
ReadOnly "off"
Enabled "on"
Visible "on"
ToolTip "on"
}
BlockParameterDefaults {
Block {
BlockType BusSelector
OutputSignals "signal1,signal2,signal3"
OutputAsBus off
}
Block {
BlockType Constant
Value "1"
VectorParams1D on
SamplingMode "Sample based"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Inherit from 'Constant value'"
LockScale off
SampleTime "inf"
FramePeriod "inf"
PreserveConstantTs off
}
Block {
BlockType Ground
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
AccumDataTypeStr "Inherit: Inherit via internal rule"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Inherit via internal rule"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
AllowDiffInputSizes off
}
}
System {
Name "k1c00"
Location [694, 20, 2569, 1056]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "125"
ReportName "simulink-default.rpt"
SIDHighWatermark "3025"
Block {
BlockType Reference
Name "ADC0"
SID "2832"
Tag "cdsAdc"
Description "type-GSC_16AI64SSA\ncard_num=0 "
Ports [0, 1]
Position [45, 697, 120, 723]
ZOrder 661
ForegroundColor "red"
DropShadow on
AttributesFormatString "%<Description>\\n%<Tag>"
LibraryVersion "1.15"
FontSize 14
SourceBlock "cdsAdcx0/ADC0"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Actuation"
SID "2894"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [1310, 898, 1380, 922]
ZOrder 716
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Am"
SID "2915"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [1360, 1368, 1430, 1392]
ZOrder 737
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Arm_length"
SID "2920"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [1565, 1400, 1630, 1430]
ZOrder 742
BackgroundColor "green"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType BusSelector
Name "Bus\nSelector6"
SID "2835"
Description "ADC Selector"
Ports [1, 1]
Position [180, 606, 200, 1194]
ZOrder 692
ShowName off
AttributesFormatString "%<Description>"
OutputSignals "adc_0_3"
Port {
PortNumber 1
Name "<adc_0_3>"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Reference
Name "C00_MON"
SID "2924"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [2150, 1375, 2230, 1405]
ZOrder 791
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "C00_Strain"
SID "2921"
Tag "Test Point"
Ports [1]
Position [2280, 1380, 2320, 1400]
ZOrder 787
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Switch
Name "Choice"
SID "2991"
Position [985, 435, 1015, 465]
ZOrder 1210
InputSameDT off
SaturateOnIntegerOverflow off
}
Block {
BlockType Switch
Name "Choice1"
SID "2992"
Position [985, 550, 1015, 580]
ZOrder 1211
InputSameDT off
SaturateOnIntegerOverflow off
}
Block {
BlockType Switch
Name "Choice2"
SID "2993"
Position [975, 695, 1005, 725]
ZOrder 1212
InputSameDT off
SaturateOnIntegerOverflow off
}
Block {
BlockType Switch
Name "Choice3"
SID "3004"
Position [475, 1050, 505, 1080]
ZOrder 1559
InputSameDT off
SaturateOnIntegerOverflow off
}
Block {
BlockType Constant
Name "Constant"
SID "3002"
Position [375, 1010, 405, 1040]
ZOrder 1557
}
Block {
BlockType Constant
Name "Constant1"
SID "2997"
Description "Maximum voltage of ADC (V)"
Position [710, 530, 755, 560]
ZOrder 1216
Value "0"
}
Block {
BlockType Constant
Name "Constant10"
SID "2939"
Description "Quantization range of 16 bit ADC."
Position [1320, 765, 1365, 795]
ZOrder 1158
Value "3276.8"
}
Block {
BlockType Constant
Name "Constant2"
SID "3003"
Position [375, 1085, 405, 1115]
ZOrder 1558
Value "0"
}
Block {
BlockType Constant
Name "Constant26"
SID "2931"
Description "Minimum voltage of ADC (V)"
Position [375, 725, 420, 755]
ZOrder 1155
Value "-10"
}
Block {
BlockType Constant
Name "Constant3"
SID "3023"
Position [450, 1165, 480, 1195]
ZOrder 2553
Value "0"
}
Block {
BlockType Constant
Name "Constant4"
SID "2932"
Description "positive and negative voltage"
Position [305, 642, 340, 668]
ZOrder 1153
Value "2"
}
Block {
BlockType Constant
Name "Constant6"
SID "2933"
Description "Maximum voltage of ADC (V)"
Position [375, 670, 420, 700]
ZOrder 1150
Value "10"
}
Block {
BlockType Constant
Name "Constant7"
SID "2934"
Description "Quantization range of 16 bit ADC."
Position [355, 595, 400, 625]
ZOrder 1151
Value "65536"
}
Block {
BlockType Reference
Name "DAC_0"
SID "2895"
Description "type=GSC_16AO16,\ncard_num=0 "
Ports [16]
Position [1975, 876, 2045, 1184]
ZOrder 717
BackgroundColor "cyan"
DropShadow on
AttributesFormatString "%<Description>"
LibraryVersion "1.8"
SourceBlock "dac/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "DARM1"
SID "2834"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [1010, 898, 1080, 922]
ZOrder 788
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "DARM2"
SID "2893"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [1115, 898, 1185, 922]
ZOrder 715
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "DCPD"
SID "2944"
Tag "Test Point"
Ports [1]
Position [855, 850, 895, 870]
ZOrder 1163
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "DCPD_MON"
SID "2930"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [710, 895, 790, 925]
ZOrder 797
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Product
Name "Divide"
SID "2917"
Ports [2, 1]
Position [1715, 1372, 1745, 1403]
ZOrder 739
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide27"
SID "2935"
Ports [2, 1]
Position [545, 622, 575, 653]
ZOrder 1156
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide7"
SID "2936"
Ports [2, 1]
Position [460, 612, 490, 643]
ZOrder 1152
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide8"
SID "2938"
Ports [2, 1]
Position [630, 892, 660, 923]
ZOrder 1157
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "DocBlock"
SID "2840"
Ports []
Position [467, 290, 507, 329]
ZOrder 660
ShowName off
LibraryVersion "1.285"
UserDataPersistent on
UserData "DataTag0"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
ContentPreviewEnabled off
DocumentType "Text"
}
Block {
BlockType Reference
Name "Flag1"
SID "3000"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [275, 1050, 340, 1080]
ZOrder 1219
BackgroundColor "green"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Flag_1"
SID "3005"
Tag "Test Point"
Ports [1]
Position [545, 1055, 585, 1075]
ZOrder 1560
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Ground
Name "Ground"
SID "2945"
Position [745, 450, 765, 470]
ZOrder 1165
}
Block {
BlockType Ground
Name "Ground1"
SID "2897"
Position [1495, 890, 1515, 910]
ZOrder 719
}
Block {
BlockType Ground
Name "Ground10"
SID "2906"
Position [1785, 1100, 1805, 1120]
ZOrder 728
}
Block {
BlockType Ground
Name "Ground11"
SID "2907"
Position [1800, 1145, 1820, 1165]
ZOrder 729
}
Block {
BlockType Ground
Name "Ground12"
SID "2908"
Position [1800, 1210, 1820, 1230]
ZOrder 730
}
Block {
BlockType Ground
Name "Ground13"
SID "2909"
Position [1865, 1170, 1885, 1190]
ZOrder 731
NamePlacement "alternate"
}
Block {
BlockType Ground
Name "Ground14"
SID "2910"
Position [1900, 1210, 1920, 1230]
ZOrder 732
}
Block {
BlockType Ground
Name "Ground15"
SID "2911"
Position [1925, 1265, 1945, 1285]
ZOrder 733
}
Block {
BlockType Ground
Name "Ground16"
SID "2947"
Position [755, 600, 775, 620]
ZOrder 1167
}
Block {
BlockType Ground
Name "Ground17"
SID "2949"
Position [745, 755, 765, 775]
ZOrder 1169
}
Block {
BlockType Ground
Name "Ground2"
SID "2898"
Position [1525, 945, 1545, 965]
ZOrder 720
}
Block {
BlockType Ground
Name "Ground3"
SID "2899"
Position [1515, 1000, 1535, 1020]
ZOrder 721
}
Block {
BlockType Ground
Name "Ground4"
SID "2900"
Position [1515, 1055, 1535, 1075]
ZOrder 722
}
Block {
BlockType Ground
Name "Ground5"
SID "2901"
Position [1650, 970, 1670, 990]
ZOrder 723
}
Block {
BlockType Ground
Name "Ground6"
SID "2902"
Position [1650, 1020, 1670, 1040]
ZOrder 724
}
Block {
BlockType Ground
Name "Ground7"
SID "2903"
Position [1640, 1130, 1660, 1150]
ZOrder 725
}
Block {
BlockType Ground
Name "Ground8"
SID "2904"
Position [1640, 1185, 1660, 1205]
ZOrder 726
}
Block {
BlockType Ground
Name "Ground9"
SID "2905"
Position [1765, 1070, 1785, 1090]
ZOrder 727
NamePlacement "alternate"
}
Block {
BlockType Reference
Name "K1:C00-VIS_Xend"
SID "3024"
Tag "cdsIPCx_SHMEM"
Description "Inter-Process Communication via Shared memory."
Ports [1, 2]
Position [1335, 1119, 1400, 1141]
ZOrder 2554
BackgroundColor "[0.462745, 0.745098, 0.560784]"
DropShadow on
Commented "on"
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsIPCx/SignalName"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "K1:C00-VIS_Yend"
SID "3020"
Tag "cdsIPCx_SHMEM"
Description "Inter-Process Communication via Shared memory."
Ports [1, 2]
Position [1335, 1039, 1400, 1061]
ZOrder 2550
BackgroundColor "[0.462745, 0.745098, 0.560784]"
DropShadow on
Commented "on"
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsIPCx/SignalName"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE1"
SID "2946"
Tag "cdsOsc"
Description "ADL=OSC.adl"
Ports [1, 3]
Position [795, 429, 850, 491]
ZOrder 1164
BackgroundColor "magenta"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsOsc/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE1_COS"
SID "2963"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [2215, 488, 2285, 512]
ZOrder 1182
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE1_DEMOD"
SID "2982"
Tag "Test Point"
Ports [1]
Position [2685, 445, 2725, 465]
ZOrder 1201
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE1_DEMOD_MON"
SID "2979"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [2550, 440, 2630, 470]
ZOrder 1198
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE1_I"
SID "2985"
Tag "Test Point"
Ports [1]
Position [2685, 340, 2725, 360]
ZOrder 1204
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE1_Q"
SID "2986"
Tag "Test Point"
Ports [1]
Position [2685, 390, 2725, 410]
ZOrder 1205
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE1_SIN"
SID "2960"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [2215, 433, 2285, 457]
ZOrder 1179
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE1_SW"
SID "2994"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [880, 380, 945, 410]
ZOrder 1213
BackgroundColor "green"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE2"
SID "2948"
Tag "cdsOsc"
Description "ADL=OSC.adl"
Ports [1, 3]
Position [795, 579, 850, 641]
ZOrder 1166
BackgroundColor "magenta"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsOsc/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE2_COS"
SID "2964"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [2235, 658, 2305, 682]
ZOrder 1183
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE2_DEMOD"
SID "2983"
Tag "Test Point"
Ports [1]
Position [2695, 610, 2735, 630]
ZOrder 1202
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE2_DEMOD_MON"
SID "2980"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [2560, 605, 2640, 635]
ZOrder 1199
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE2_I"
SID "2987"
Tag "Test Point"
Ports [1]
Position [2695, 500, 2735, 520]
ZOrder 1206
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE2_Q"
SID "2988"
Tag "Test Point"
Ports [1]
Position [2695, 550, 2735, 570]
ZOrder 1207
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE2_SIN"
SID "2961"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [2235, 598, 2305, 622]
ZOrder 1180
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE2_SW"
SID "2995"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [880, 505, 945, 535]
ZOrder 1214
BackgroundColor "green"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE3"
SID "2950"
Tag "cdsOsc"
Description "ADL=OSC.adl"
Ports [1, 3]
Position [795, 734, 850, 796]
ZOrder 1168
BackgroundColor "magenta"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsOsc/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE3_COS"
SID "2965"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [2235, 853, 2305, 877]
ZOrder 1184
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE3_DEMOD"
SID "2984"
Tag "Test Point"
Ports [1]
Position [2695, 805, 2735, 825]
ZOrder 1203
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE3_DEMOD_MON"
SID "2981"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [2560, 800, 2640, 830]
ZOrder 1200
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE3_I"
SID "2989"
Tag "Test Point"
Ports [1]
Position [2685, 690, 2725, 710]
ZOrder 1208
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE3_Q"
SID "2990"
Tag "Test Point"
Ports [1]
Position [2685, 740, 2725, 760]
ZOrder 1209
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE3_SIN"
SID "2962"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [2235, 793, 2305, 817]
ZOrder 1181
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "LINE3_SW"
SID "2996"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [880, 645, 945, 675]
ZOrder 1215
BackgroundColor "green"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "OFFSET"
SID "2942"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [830, 965, 895, 995]
ZOrder 1161
BackgroundColor "green"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "PIEZO_OUT"
SID "2941"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [1415, 830, 1495, 860]
ZOrder 1160
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Product
Name "Product"
SID "2954"
Ports [2, 1]
Position [2120, 592, 2150, 623]
ZOrder 1173
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product1"
SID "2955"
Ports [2, 1]
Position [2120, 647, 2150, 678]
ZOrder 1174
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product10"
SID "2969"
Ports [2, 1]
Position [2360, 657, 2390, 688]
ZOrder 1188
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product11"
SID "2970"
Ports [2, 1]
Position [2360, 797, 2390, 828]
ZOrder 1189
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product12"
SID "2971"
Ports [2, 1]
Position [2360, 852, 2390, 883]
ZOrder 1190
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product2"
SID "2956"
Ports [2, 1]
Position [2120, 787, 2150, 818]
ZOrder 1175
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product3"
SID "2940"
Ports [2, 1]
Position [1520, 757, 1550, 788]
ZOrder 1159
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product4"
SID "2957"
Ports [2, 1]
Position [2120, 842, 2150, 873]
ZOrder 1176
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product5"
SID "2958"
Ports [2, 1]
Position [2110, 427, 2140, 458]
ZOrder 1177
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product6"
SID "2959"
Ports [2, 1]
Position [2110, 482, 2140, 513]
ZOrder 1178
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product7"
SID "2966"
Ports [2, 1]
Position [2350, 437, 2380, 468]
ZOrder 1185
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product8"
SID "2967"
Ports [2, 1]
Position [2350, 492, 2380, 523]
ZOrder 1186
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product9"
SID "2968"
Ports [2, 1]
Position [2360, 602, 2390, 633]
ZOrder 1187
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "SQRT"
SID "2975"
Tag "cdsSqrt"
Ports [1, 1]
Position [2480, 436, 2510, 474]
ZOrder 1194
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsSqrt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "SQRT1"
SID "2977"
Tag "cdsSqrt"
Ports [1, 1]
Position [2490, 601, 2520, 639]
ZOrder 1196
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsSqrt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "SQRT2"
SID "2978"
Tag "cdsSqrt"
Ports [1, 1]
Position [2490, 796, 2520, 834]
ZOrder 1197
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsSqrt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Sensing"
SID "2922"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [840, 898, 910, 922]
ZOrder 789
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Sum
Name "Sum"
SID "2916"
Ports [2, 1]
Position [1515, 1370, 1535, 1390]
ZOrder 738
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum1"
SID "2943"
Ports [2, 1]
Position [935, 900, 955, 920]
ZOrder 1162
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum2"
SID "2951"
Ports [3, 1]
Position [1055, 627, 1080, 663]
ZOrder 1170
ShowName off
Inputs "|+++"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum22"
SID "2937"
Ports [2, 1]
Position [480, 675, 500, 695]
ZOrder 1154
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum3"
SID "2953"
Ports [2, 1]
Position [1140, 635, 1160, 655]
ZOrder 1172
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum4"
SID "2972"
Ports [2, 1]
Position [2420, 445, 2440, 465]
ZOrder 1191
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum5"
SID "2973"
Ports [2, 1]
Position [2430, 610, 2450, 630]
ZOrder 1192
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum6"
SID "2974"
Ports [2, 1]
Position [2430, 805, 2450, 825]
ZOrder 1193
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "dL_ctrl"
SID "2928"
Tag "Test Point"
Ports [1]
Position [1685, 1315, 1725, 1335]
ZOrder 795
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "dL_ctrl_MON"
SID "2926"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [1555, 1310, 1635, 1340]
ZOrder 793
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "dL_res"
SID "2929"
Tag "Test Point"
Ports [1]
Position [1685, 1505, 1725, 1525]
ZOrder 796
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "dL_res_MON"
SID "2927"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [1560, 1500, 1640, 1530]
ZOrder 794
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "d_ctrl"
SID "2923"
Tag "Test Point"
Ports [1]
Position [1435, 1315, 1475, 1335]
ZOrder 790
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "d_ctrl_MON"
SID "2913"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [1205, 1365, 1285, 1395]
ZOrder 735
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "d_err"
SID "2925"
Tag "Test Point"
Ports [1]
Position [1435, 1510, 1475, 1530]
ZOrder 792
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "d_err_MON"
SID "2912"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [1205, 1435, 1285, 1465]
ZOrder 734
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "host=standalone\nsite=K1\nrate=16K\ndcuid=89\nshmem_daq=1\nspecific_cpu=6\nadcSlave=1\nno_rfm_dma=1"
SID "2891"
Tag "cdsParameters"
Description "SCRIPT=activateDQ.py "
" "
" \n "
" "
" \nPurpose: "
" "
" \n "
" "
" \nProvide system parameters to the FE code generator to"
" properly configure the generated EPICS names, rep rate of the FE controller, and the Data Acquisition node ID f"
"or proper storage of data from this FE controller. \n "
" "
" \nUseage: "
" "
" \n "
" "
" \nThe part NAME"
" field is used to identify the FE parameters. It must be of the form: "
" \n "
" "
" "
" \nsite= "
" "
" \nrate= "
" "
" \ndcuid= "
" "
" \n "
" "
" \nWhere: "
" "
" \n "
" "
" \nsite= argument may be H1, H2, L1, M1, G1, eit"
"her as a single argument or multiple, for example site=H1,H2. These are the only names allowed. These will becom"
"e the first two characters of all EPICS and signal names (for example G1:).\n "
" "
" \nrate= may be 2K, 16K, 32K"
", or 64K "
" \n "
" "
" \ndcuid"
"= is site specific ie it must be unique at each site. "
" "
" "
Ports [1, 1]
Position [65, 835, 105, 895]
ZOrder 659
BackgroundColor "[1.000000, 0.501961, 0.000000]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsParameters/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "invCm"
SID "2914"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [1360, 1438, 1430, 1462]
ZOrder 736
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "zero"
SID "3021"
Tag "Test Point"
Ports [1]
Position [535, 1170, 575, 1190]
ZOrder 2551
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Line {
ZOrder 1998
SrcBlock "ADC0"
SrcPort 1
Points [40, 0]
DstBlock "Bus\nSelector6"
DstPort 1
}
Line {
ZOrder 2235
SrcBlock "Ground1"
SrcPort 1
DstBlock "DAC_0"
DstPort 2
}
Line {
ZOrder 2236
SrcBlock "Ground2"
SrcPort 1
Points [0, -35]
DstBlock "DAC_0"
DstPort 3
}
Line {
ZOrder 2237
SrcBlock "Ground3"
SrcPort 1
Points [41, 0; 0, -70]
DstBlock "DAC_0"
DstPort 4
}
Line {
ZOrder 2238
SrcBlock "Ground4"
SrcPort 1
Points [62, 0; 0, -105]
DstBlock "DAC_0"
DstPort 5
}
Line {
ZOrder 2076
SrcBlock "Ground7"
SrcPort 1
Points [63, 0; 0, -120]
DstBlock "DAC_0"
DstPort 8
}
Line {
ZOrder 2079
SrcBlock "Ground9"
SrcPort 1
Points [11, 0; 0, -20]
DstBlock "DAC_0"
DstPort 10
}
Line {
ZOrder 2080
SrcBlock "Ground10"
SrcPort 1
Points [0, -30]
DstBlock "DAC_0"
DstPort 11
}
Line {
ZOrder 2084
SrcBlock "Ground11"
SrcPort 1
Points [10, 0; 0, -55]
DstBlock "DAC_0"
DstPort 12
}
Line {
ZOrder 2078
SrcBlock "Ground8"
SrcPort 1
Points [71, 0; 0, -155]
DstBlock "DAC_0"
DstPort 9
}
Line {
ZOrder 2085
SrcBlock "Ground12"
SrcPort 1
Points [24, 0; 0, -100]
DstBlock "DAC_0"
DstPort 13
}
Line {
ZOrder 2086
SrcBlock "Ground13"
SrcPort 1
Points [13, 0; 0, -40]
DstBlock "DAC_0"
DstPort 14
}
Line {
ZOrder 2087
SrcBlock "Ground14"
SrcPort 1
Points [9, 0; 0, -60]
DstBlock "DAC_0"
DstPort 15
}
Line {
ZOrder 2088
SrcBlock "Ground15"
SrcPort 1
Points [0, -95]
DstBlock "DAC_0"
DstPort 16
}
Line {
ZOrder 2057
SrcBlock "DARM2"
SrcPort 1
Points [9, 0]
Branch {
ZOrder 2308
Points [54, 0; 0, 66; -81, 0; 0, 404]
DstBlock "d_ctrl_MON"
DstPort 1
}
Branch {
ZOrder 2307
Points [0, -165; -49, 0]
DstBlock "Sum3"
DstPort 2
}
}
Line {
ZOrder 2104
SrcBlock "Sum"
SrcPort 1
DstBlock "Divide"
DstPort 1
}
Line {
ZOrder 2107
SrcBlock "Arm_length"
SrcPort 1
Points [47, 0; 0, -20]
DstBlock "Divide"
DstPort 2
}
Line {
ZOrder 2118
SrcBlock "C00_MON"
SrcPort 1
DstBlock "C00_Strain"
DstPort 1
}
Line {
ZOrder 2110
SrcBlock "DARM1"
SrcPort 1
DstBlock "DARM2"
DstPort 1
}
Line {
ZOrder 2099
SrcBlock "d_ctrl_MON"
SrcPort 1
Points [23, 0]
Branch {
ZOrder 2131
DstBlock "Am"
DstPort 1
}
Branch {
ZOrder 2130
Points [0, -55]
DstBlock "d_ctrl"
DstPort 1
}
}
Line {
ZOrder 2101
Labels [1, 0]
SrcBlock "d_err_MON"
SrcPort 1
Points [33, 0]
Branch {
ZOrder 2135
DstBlock "invCm"
DstPort 1
}
Branch {
ZOrder 2134
Points [0, 70]
DstBlock "d_err"
DstPort 1
}
}
Line {
ZOrder 2127
SrcBlock "dL_ctrl_MON"
SrcPort 1
DstBlock "dL_ctrl"
DstPort 1
}
Line {
ZOrder 2129
SrcBlock "dL_res_MON"
SrcPort 1
DstBlock "dL_res"
DstPort 1
}
Line {
ZOrder 2133
SrcBlock "Am"
SrcPort 1
Points [51, 0]
Branch {
ZOrder 2142
Points [0, -55]
DstBlock "dL_ctrl_MON"
DstPort 1
}
Branch {
ZOrder 2141
DstBlock "Sum"
DstPort 1
}
}
Line {
ZOrder 2137
SrcBlock "invCm"
SrcPort 1
Points [61, 0]
Branch {
ZOrder 2140
Points [0, 65]
DstBlock "dL_res_MON"
DstPort 1
}
Branch {
ZOrder 2139
Points [29, 0]
DstBlock "Sum"
DstPort 2
}
}
Line {
ZOrder 2156
SrcBlock "DCPD_MON"
SrcPort 1
Points [22, 0]
Branch {
ZOrder 2399
Points [0, -50]
DstBlock "DCPD"
DstPort 1
}
Branch {
ZOrder 2398
DstBlock "Sensing"
DstPort 1
}
}
Line {
Name "<adc_0_3>"
ZOrder 2212
Labels [0, 0]
SrcBlock "Bus\nSelector6"
SrcPort 1
DstBlock "Divide8"
DstPort 1
}
Line {
ZOrder 2158
SrcBlock "Constant4"
SrcPort 1
Points [100, 0]
DstBlock "Divide7"
DstPort 2
}
Line {
ZOrder 2159
SrcBlock "Sum22"
SrcPort 1
Points [17, 0; 0, -40]
DstBlock "Divide27"
DstPort 2
}
Line {
ZOrder 2160
SrcBlock "Constant7"
SrcPort 1
Points [25, 0; 0, 10]
DstBlock "Divide7"
DstPort 1
}
Line {
ZOrder 2196
SrcBlock "Constant6"
SrcPort 1
DstBlock "Sum22"
DstPort 1
}
Line {
ZOrder 2197
SrcBlock "Constant26"
SrcPort 1
Points [65, 0]
DstBlock "Sum22"
DstPort 2
}
Line {
ZOrder 2198
SrcBlock "Divide7"
SrcPort 1
DstBlock "Divide27"
DstPort 1
}
Line {
ZOrder 2218
SrcBlock "Divide27"
SrcPort 1
Points [9, 0; 0, 275]
DstBlock "Divide8"
DstPort 2
}
Line {
ZOrder 2213
SrcBlock "Divide8"
SrcPort 1
DstBlock "DCPD_MON"
DstPort 1
}
Line {
ZOrder 2223
SrcBlock "Constant10"
SrcPort 1
DstBlock "Product3"
DstPort 2
}
Line {
ZOrder 2224
SrcBlock "Product3"
SrcPort 1
Points [58, 0; 0, 105]
DstBlock "DAC_0"
DstPort 1
}
Line {
ZOrder 2233
SrcBlock "Ground6"
SrcPort 1
Points [44, 0; 0, -30]
DstBlock "DAC_0"
DstPort 7
}
Line {
ZOrder 2239
SrcBlock "Ground5"
SrcPort 1
DstBlock "DAC_0"
DstPort 6
}
Line {
ZOrder 2242
SrcBlock "PIEZO_OUT"
SrcPort 1
Points [5, 0]
DstBlock "Product3"
DstPort 1
}
Line {
ZOrder 2243
SrcBlock "Sensing"
SrcPort 1
DstBlock "Sum1"
DstPort 1
}
Line {
ZOrder 2244
SrcBlock "Sum1"
SrcPort 1
Points [23, 0]
Branch {
ZOrder 2247
Points [0, 540]
DstBlock "d_err_MON"
DstPort 1
}
Branch {
ZOrder 2246
DstBlock "DARM1"
DstPort 1
}
}
Line {
ZOrder 2245
SrcBlock "OFFSET"
SrcPort 1
Points [45, 0]
DstBlock "Sum1"
DstPort 2
}
Line {
ZOrder 2293
SrcBlock "Ground"
SrcPort 1
DstBlock "LINE1"
DstPort 1
}
Line {
ZOrder 2294
SrcBlock "Ground16"
SrcPort 1
DstBlock "LINE2"
DstPort 1
}
Line {
ZOrder 2295
SrcBlock "Ground17"
SrcPort 1
DstBlock "LINE3"
DstPort 1
}
Line {
ZOrder 2305
SrcBlock "Sum2"
SrcPort 1
DstBlock "Sum3"
DstPort 1
}
Line {
ZOrder 2309
SrcBlock "Sum3"
SrcPort 1
Points [116, 0; 0, 265]
DstBlock "Actuation"
DstPort 1
}
Line {
ZOrder 2310
SrcBlock "LINE1"
SrcPort 2
Points [80, 0; 0, 25; 595, 0; 0, -50]
DstBlock "Product5"
DstPort 1
}
Line {
ZOrder 2311
SrcBlock "LINE1"
SrcPort 3
Points [25, 0; 0, 10]
DstBlock "Product6"
DstPort 1
}
Line {
ZOrder 2312
SrcBlock "LINE2"
SrcPort 2
Points [72, 0; 0, -10]
DstBlock "Product"
DstPort 1
}
Line {
ZOrder 2314
SrcBlock "LINE3"
SrcPort 2
Points [170, 0; 0, -14; 1077, 0; 0, 44]
DstBlock "Product2"
DstPort 1
}
Line {
ZOrder 2315
SrcBlock "LINE3"
SrcPort 3
Points [455, 0; 0, -43; 756, 0; 0, 108]
DstBlock "Product4"
DstPort 1
}
Line {
ZOrder 2316
SrcBlock "LINE2"
SrcPort 3
Points [86, 0; 0, -10; 1161, 0; 0, 35]
DstBlock "Product1"
DstPort 1
}
Line {
ZOrder 2119
SrcBlock "Divide"
SrcPort 1
Points [335, 0]
Branch {
ZOrder 2320
Points [0, -525]
Branch {
ZOrder 2392
Points [0, -55]
Branch {
ZOrder 2393
Points [0, -140]
Branch {
ZOrder 2387
Points [0, -55]
Branch {
ZOrder 2384
Points [0, -110]
Branch {
ZOrder 2332
DstBlock "Product6"
DstPort 2
}
Branch {
ZOrder 2331
Points [0, -55]
DstBlock "Product5"
DstPort 2
}
}
Branch {
ZOrder 2329
DstBlock "Product"
DstPort 2
}
}
Branch {
ZOrder 2327
DstBlock "Product1"
DstPort 2
}
}
Branch {
ZOrder 2325
DstBlock "Product2"
DstPort 2
}
}
Branch {
ZOrder 2321
DstBlock "Product4"
DstPort 2
}
}
Branch {
ZOrder 2319
DstBlock "C00_MON"
DstPort 1
}
}
Line {
ZOrder 2333
SrcBlock "Product5"
SrcPort 1
DstBlock "LINE1_SIN"
DstPort 1
}
Line {
ZOrder 2334
SrcBlock "Product2"
SrcPort 1
DstBlock "LINE3_SIN"
DstPort 1
}
Line {
ZOrder 2335
SrcBlock "Product"
SrcPort 1
DstBlock "LINE2_SIN"
DstPort 1
}
Line {
ZOrder 2336
SrcBlock "Product6"
SrcPort 1
DstBlock "LINE1_COS"
DstPort 1
}
Line {
ZOrder 2337
SrcBlock "Product1"
SrcPort 1
Points [37, 0; 0, 5]
DstBlock "LINE2_COS"
DstPort 1
}
Line {
ZOrder 2339
SrcBlock "Product4"
SrcPort 1
Points [37, 0; 0, 5]
DstBlock "LINE3_COS"
DstPort 1
}
Line {
ZOrder 2340
SrcBlock "LINE1_SIN"
SrcPort 1
Points [9, 0]
Branch {
ZOrder 2381
Points [0, -95]
DstBlock "LINE1_I"
DstPort 1
}
Branch {
ZOrder 2380
Points [8, 0]
Branch {
ZOrder 2343
Points [0, 15]
DstBlock "Product7"
DstPort 2
}
Branch {
ZOrder 2342
DstBlock "Product7"
DstPort 1
}
}
}
Line {
ZOrder 2346
SrcBlock "LINE1_COS"
SrcPort 1
Points [10, 0]
Branch {
ZOrder 2348
Points [13, 0]
Branch {
ZOrder 2383
Points [0, -100]
DstBlock "LINE1_Q"
DstPort 1
}
Branch {
ZOrder 2382
DstBlock "Product8"
DstPort 1
}
}
Branch {
ZOrder 2347
Points [0, 15]
DstBlock "Product8"
DstPort 2
}
}
Line {
ZOrder 2349
SrcBlock "LINE2_SIN"
SrcPort 1
Points [14, 0]
Branch {
ZOrder 2389
Points [0, -42; 274, 0; 0, -58]
DstBlock "LINE2_I"
DstPort 1
}
Branch {
ZOrder 2388
Points [18, 0]
Branch {
ZOrder 2354
Points [0, 15]
DstBlock "Product9"
DstPort 2
}
Branch {
ZOrder 2353
DstBlock "Product9"
DstPort 1
}
}
}
Line {
ZOrder 2350
SrcBlock "LINE2_COS"
SrcPort 1
Points [10, 0]
Branch {
ZOrder 2391
Points [0, -19; 100, 0; 0, -91]
DstBlock "LINE2_Q"
DstPort 1
}
Branch {
ZOrder 2390
Points [12, 0; 0, -5; 5, 0]
Branch {
ZOrder 2356
Points [0, 15]
DstBlock "Product10"
DstPort 2
}
Branch {
ZOrder 2355
DstBlock "Product10"
DstPort 1
}
}
}
Line {
ZOrder 2351
SrcBlock "LINE3_SIN"
SrcPort 1
Points [25, 0]
Branch {
ZOrder 2395
Points [0, -57; 265, 0; 0, -48]
DstBlock "LINE3_I"
DstPort 1
}
Branch {
ZOrder 2394
Points [6, 0]
Branch {
ZOrder 2358
Points [0, 15]
DstBlock "Product11"
DstPort 2
}
Branch {
ZOrder 2357
DstBlock "Product11"
DstPort 1
}
}
}
Line {
ZOrder 2352
SrcBlock "LINE3_COS"
SrcPort 1
Points [21, 0]
Branch {
ZOrder 2360
Points [0, 10]
DstBlock "Product12"
DstPort 2
}
Branch {
ZOrder 2359
Points [1, 0; 0, -5; 6, 0]
Branch {
ZOrder 2397
Points [0, 50; 322, 0; 0, -160]
DstBlock "LINE3_Q"
DstPort 1
}
Branch {
ZOrder 2396
DstBlock "Product12"
DstPort 1
}
}
}
Line {
ZOrder 2361
SrcBlock "Product7"
SrcPort 1
DstBlock "Sum4"
DstPort 1
}
Line {
ZOrder 2362
SrcBlock "Product8"
SrcPort 1
Points [45, 0]
DstBlock "Sum4"
DstPort 2
}
Line {
ZOrder 2363
SrcBlock "Product9"
SrcPort 1
DstBlock "Sum5"
DstPort 1
}
Line {
ZOrder 2364
SrcBlock "Product10"
SrcPort 1
Points [45, 0]
DstBlock "Sum5"
DstPort 2
}
Line {
ZOrder 2365
SrcBlock "Product11"
SrcPort 1
DstBlock "Sum6"
DstPort 1
}
Line {
ZOrder 2366
SrcBlock "Product12"
SrcPort 1
Points [45, 0]
DstBlock "Sum6"
DstPort 2
}
Line {
ZOrder 2367
SrcBlock "Sum4"
SrcPort 1
DstBlock "SQRT"
DstPort 1
}
Line {
ZOrder 2368
SrcBlock "Sum5"
SrcPort 1
DstBlock "SQRT1"
DstPort 1
}
Line {
ZOrder 2369
SrcBlock "Sum6"
SrcPort 1
DstBlock "SQRT2"
DstPort 1
}
Line {
ZOrder 2370
SrcBlock "SQRT"
SrcPort 1
DstBlock "LINE1_DEMOD_MON"
DstPort 1
}
Line {
ZOrder 2372
SrcBlock "SQRT1"
SrcPort 1
DstBlock "LINE2_DEMOD_MON"
DstPort 1
}
Line {
ZOrder 2374
SrcBlock "SQRT2"
SrcPort 1
DstBlock "LINE3_DEMOD_MON"
DstPort 1
}
Line {
ZOrder 2376
SrcBlock "LINE1_DEMOD_MON"
SrcPort 1
DstBlock "LINE1_DEMOD"
DstPort 1
}
Line {
ZOrder 2378
SrcBlock "LINE2_DEMOD_MON"
SrcPort 1
DstBlock "LINE2_DEMOD"
DstPort 1
}
Line {
ZOrder 2379
SrcBlock "LINE3_DEMOD_MON"
SrcPort 1
DstBlock "LINE3_DEMOD"
DstPort 1
}
Line {
ZOrder 2400
SrcBlock "LINE1"
SrcPort 1
DstBlock "Choice"
DstPort 1
}
Line {
ZOrder 2402
SrcBlock "Choice"
SrcPort 1
Points [27, 0; 0, 190]
DstBlock "Sum2"
DstPort 1
}
Line {
ZOrder 2406
SrcBlock "Choice1"
SrcPort 1
Points [11, 0; 0, 85]
DstBlock "Sum2"
DstPort 2
}
Line {
ZOrder 2405
SrcBlock "LINE2"
SrcPort 1
Points [34, 0; 0, -35]
DstBlock "Choice1"
DstPort 1
}
Line {
ZOrder 2407
SrcBlock "LINE3"
SrcPort 1
Points [57, 0; 0, -45]
DstBlock "Choice2"
DstPort 1
}
Line {
ZOrder 2408
SrcBlock "Choice2"
SrcPort 1
Points [20, 0; 0, -50]
DstBlock "Sum2"
DstPort 3
}
Line {
ZOrder 2409
SrcBlock "LINE1_SW"
SrcPort 1
Points [15, 0; 0, 55]
DstBlock "Choice"
DstPort 2
}
Line {
ZOrder 2410
SrcBlock "LINE2_SW"
SrcPort 1
Points [15, 0; 0, 45]
DstBlock "Choice1"
DstPort 2
}
Line {
ZOrder 2411
SrcBlock "LINE3_SW"
SrcPort 1
Points [10, 0]
DstBlock "Choice2"
DstPort 2
}
Line {
ZOrder 2412
SrcBlock "Constant1"
SrcPort 1
Points [104, 0]
Branch {
ZOrder 2414
Points [0, 30]
Branch {
ZOrder 2417
Points [0, 145]
DstBlock "Choice2"
DstPort 3
}
Branch {
ZOrder 2416
DstBlock "Choice1"
DstPort 3
}
}
Branch {
ZOrder 2413
Points [1, 0; 0, -51; 95, 0; 0, -34]
DstBlock "Choice"
DstPort 3
}
}
Line {
ZOrder 2511
SrcBlock "Constant"
SrcPort 1
Points [50, 0]
DstBlock "Choice3"
DstPort 1
}
Line {
ZOrder 2512
SrcBlock "Constant2"
SrcPort 1
Points [50, 0]
DstBlock "Choice3"
DstPort 3
}
Line {
ZOrder 2514
SrcBlock "Flag1"
SrcPort 1
DstBlock "Choice3"
DstPort 2
}
Line {
ZOrder 2517
SrcBlock "Choice3"
SrcPort 1
DstBlock "Flag_1"
DstPort 1
}
Line {
ZOrder 2739
SrcBlock "Constant3"
SrcPort 1
DstBlock "zero"
DstPort 1
}
Line {
ZOrder 2241
SrcBlock "Actuation"
SrcPort 1
Points [15, 0]
Branch {
ZOrder 2637
Points [0, 77; -80, 0; 0, 63]
Branch {
ZOrder 2742
DstBlock "K1:C00-VIS_Xend"
DstPort 1
}
Branch {
ZOrder 2741
DstBlock "K1:C00-VIS_Yend"
DstPort 1
}
}
Branch {
ZOrder 2520
DstBlock "PIEZO_OUT"
DstPort 1
}
}
Annotation {
SID "2892"
Name "#DAQ Channels\nC00_Strain 16384\nd_ctrl 16384\nd_err 16384\nFlag_1 16384\nzero 16384"
Position [16, 1081, 130, 1191]
AutoSize on
WordWrap off
HorizontalAlignment "left"
DropShadow on
ZOrder -1
FontSize 14
}
}
}
MatData {
NumRecords 1
DataRecord {
Tag DataTag0
Data " %)30 . L $ 8 ( @ % \" $ ! 0 % 0 \" $ 0 =F5R<"
"VEO;@!C;VYT96YT X X !@ @ & 4 ( 0 $ ! D ( FIF9F9F9\\3\\. ( $ "
" 8 ( ! % \" $ #I 0 0 Z0 %-#62 M(%-U<W!E;G-I;VX@0V]N=')O;&QE<B!9($5N9 I4:&"
"ES(&-O;G1R;VQS('1H92!S=7-P96YS:6]N(&9O<B!T:&4@62!%;F0@5&5S=\"!-87-S(\"A%5$U9*0I#:&%N;F5L<R!F;W(@=&AI<R!A<F4@4TE413"
"I355,M151-62U86%A8\"E1H:7,@=&%L:W,@=&\\@=&AE($Q30RYM9&P@*$QE;F=T:\"!396YS:6YG(&%N9\"!#;VYT<F]L*2!A<R!W96QL(&%S(%-0"
"62YM9&P@*%-U<W!E;G-I;VX@4&QA;G0@62!%;F0I "
}
}
simulink_archive/simLink/Copy_of_k1x01 July07.mdl 0 → 100644
View file @ 81d2c40c
This source diff could not be displayed because it is too large. You can view the blob instead.
simulink_archive/simLink/ESD_LINEARIZATION_WITH_CHARGE_MASTER.mdl 0 → 100644
View file @ 81d2c40c
Library {
Name "ESD_LINEARIZATION_WITH_CHARGE_MASTER"
Version 8.0
MdlSubVersion 0
SavedCharacterEncoding "US-ASCII"
LibraryType "BlockLibrary"
SaveDefaultBlockParams on
ScopeRefreshTime 0.035000
OverrideScopeRefreshTime on
DisableAllScopes off
FPTRunName "Run 1"
MaxMDLFileLineLength 120
Object {
$PropName "BdWindowsInfo"
$ObjectID 1
$ClassName "Simulink.BDWindowsInfo"
Object {
$PropName "WindowsInfo"
$ObjectID 2
$ClassName "Simulink.WindowInfo"
IsActive [1]
Location [323.0, 194.0, 1482.0, 791.0]
Object {
$PropName "ModelBrowserInfo"
$ObjectID 3
$ClassName "Simulink.ModelBrowserInfo"
Visible [1]
DockPosition "Left"
Width [50]
Height [50]
Filter [9]
}
Object {
$PropName "ExplorerBarInfo"
$ObjectID 4
$ClassName "Simulink.ExplorerBarInfo"
Visible [1]
}
Object {
$PropName "EditorsInfo"
$ObjectID 5
$ClassName "Simulink.EditorInfo"
IsActive [1]
ViewObjType "SimulinkSubsys"
LoadSaveID "1"
Extents [1243.0, 618.0]
ZoomFactor [1.0]
Offset [0.0, 0.0]
}
}
}
Created "Tue Aug 05 13:37:26 2014"
Creator "joseph.betzwieser"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "joseph.betzwieser"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Tue Aug 05 14:36:43 2014"
RTWModifiedTimeStamp 329150201
ModelVersionFormat "1.%<AutoIncrement:4>"
ConfigurationManager "None"
SampleTimeColors off
SampleTimeAnnotations off
LibraryLinkDisplay "disabled"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowDesignRanges off
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
ShowTestPointIcons on
ShowSignalResolutionIcons on
ShowViewerIcons on
SortedOrder off
ExecutionContextIcon off
ShowLinearizationAnnotations on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
SimulationMode "normal"
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
RecordCoverage off
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
CovForceBlockReductionOff on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeReport off
CovReportOnPause on
CovModelRefEnable "Off"
CovExternalEMLEnable off
ExtModeBatchMode off
ExtModeEnableFloating on
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigDurationFloating "auto"
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
ShowModelReferenceBlockVersion off
ShowModelReferenceBlockIO off
Array {
Type "Handle"
Dimension 1
Simulink.ConfigSet {
$ObjectID 6
Version "1.12.1"
Array {
Type "Handle"
Dimension 8
Simulink.SolverCC {
$ObjectID 7
Version "1.12.1"
StartTime "0.0"
StopTime "10.0"
AbsTol "auto"
FixedStep "auto"
InitialStep "auto"
MaxNumMinSteps "-1"
MaxOrder 5
ZcThreshold "auto"
ConsecutiveZCsStepRelTol "10*128*eps"
MaxConsecutiveZCs "1000"
ExtrapolationOrder 4
NumberNewtonIterations 1
MaxStep "auto"
MinStep "auto"
MaxConsecutiveMinStep "1"
RelTol "1e-3"
SolverMode "Auto"
EnableConcurrentExecution off
ConcurrentTasks off
Solver "ode45"
SolverName "ode45"
SolverJacobianMethodControl "auto"
ShapePreserveControl "DisableAll"
ZeroCrossControl "UseLocalSettings"
ZeroCrossAlgorithm "Nonadaptive"
AlgebraicLoopSolver "TrustRegion"
SolverResetMethod "Fast"
PositivePriorityOrder off
AutoInsertRateTranBlk off
SampleTimeConstraint "Unconstrained"
InsertRTBMode "Whenever possible"
}
Simulink.DataIOCC {
$ObjectID 8
Version "1.12.1"
Decimation "1"
ExternalInput "[t, u]"
FinalStateName "xFinal"
InitialState "xInitial"
LimitDataPoints on
MaxDataPoints "1000"
LoadExternalInput off
LoadInitialState off
SaveFinalState off
SaveCompleteFinalSimState off
SaveFormat "Array"
SignalLoggingSaveFormat "Dataset"
SaveOutput on
SaveState off
SignalLogging on
DSMLogging on
InspectSignalLogs off
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName "xout"
TimeSaveName "tout"
OutputSaveName "yout"
SignalLoggingName "logsout"
DSMLoggingName "dsmout"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
ReturnWorkspaceOutputsName "out"
Refine "1"
}
Simulink.OptimizationCC {
$ObjectID 9
Version "1.12.1"
Array {
Type "Cell"
Dimension 8
Cell "BooleansAsBitfields"
Cell "PassReuseOutputArgsAs"
Cell "PassReuseOutputArgsThreshold"
Cell "ZeroExternalMemoryAtStartup"
Cell "ZeroInternalMemoryAtStartup"
Cell "OptimizeModelRefInitCode"
Cell "NoFixptDivByZeroProtection"
Cell "UseSpecifiedMinMax"
PropName "DisabledProps"
}
BlockReduction on
BooleanDataType on
ConditionallyExecuteInputs on
InlineParams off
UseIntDivNetSlope off
UseFloatMulNetSlope off
UseSpecifiedMinMax off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
EnhancedBackFolding off
StrengthReduction off
ExpressionFolding on
BooleansAsBitfields off
BitfieldContainerType "uint_T"
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs "Structure reference"
ExpressionDepthLimit 2147483647
FoldNonRolledExpr on
LocalBlockOutputs on
RollThreshold 5
SystemCodeInlineAuto off
StateBitsets off
DataBitsets off
UseTempVars off
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero off
NoFixptDivByZeroProtection off
EfficientFloat2IntCast off
EfficientMapNaN2IntZero on
OptimizeModelRefInitCode off
LifeSpan "inf"
MaxStackSize "Inherit from target"
BufferReusableBoundary on
SimCompilerOptimization "Off"
AccelVerboseBuild off
ParallelExecutionInRapidAccelerator on
}
Simulink.DebuggingCC {
$ObjectID 10
Version "1.12.1"
RTPrefix "error"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
SignalInfNanChecking "none"
SignalRangeChecking "none"
ReadBeforeWriteMsg "UseLocalSettings"
WriteAfterWriteMsg "UseLocalSettings"
WriteAfterReadMsg "UseLocalSettings"
AlgebraicLoopMsg "warning"
ArtificialAlgebraicLoopMsg "warning"
SaveWithDisabledLinksMsg "warning"
SaveWithParameterizedLinksMsg "warning"
CheckSSInitialOutputMsg on
UnderspecifiedInitializationDetection "Classic"
MergeDetectMultiDrivingBlocksExec "none"
CheckExecutionContextPreStartOutputMsg off
CheckExecutionContextRuntimeOutputMsg off
SignalResolutionControl "UseLocalSettings"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
TimeAdjustmentMsg "none"
MaxConsecutiveZCsMsg "error"
MaskedZcDiagnostic "warning"
IgnoredZcDiagnostic "warning"
SolverPrmCheckMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskDSMMsg "error"
MultiTaskCondExecSysMsg "error"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
TasksWithSamePriorityMsg "warning"
SigSpecEnsureSampleTimeMsg "warning"
CheckMatrixSingularityMsg "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterUnderflowMsg "none"
ParameterPrecisionLossMsg "warning"
ParameterTunabilityLossMsg "warning"
FixptConstUnderflowMsg "none"
FixptConstOverflowMsg "none"
FixptConstPrecisionLossMsg "none"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
FcnCallInpInsideContextMsg "EnableAllAsError"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SFcnCompatibilityMsg "none"
FrameProcessingCompatibilityMsg "warning"
UniqueDataStoreMsg "none"
BusObjectLabelMismatch "warning"
RootOutportRequireBusObject "warning"
AssertControl "UseLocalSettings"
EnableOverflowDetection off
ModelReferenceIOMsg "none"
ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"
ModelReferenceVersionMismatchMessage "none"
ModelReferenceIOMismatchMessage "none"
ModelReferenceCSMismatchMessage "none"
UnknownTsInhSupMsg "warning"
ModelReferenceDataLoggingMessage "warning"
ModelReferenceSymbolNameMessage "warning"
ModelReferenceExtraNoncontSigs "error"
StateNameClashWarn "warning"
SimStateInterfaceChecksumMismatchMsg "warning"
SimStateOlderReleaseMsg "error"
InitInArrayFormatMsg "warning"
StrictBusMsg "ErrorLevel1"
BusNameAdapt "WarnAndRepair"
NonBusSignalsTreatedAsBus "none"
LoggingUnavailableSignals "error"
BlockIODiagnostic "none"
SFUnusedDataAndEventsDiag "warning"
SFUnexpectedBacktrackingDiag "warning"
SFInvalidInputDataAccessInChartInitDiag "warning"
SFNoUnconditionalDefaultTransitionDiag "warning"
SFTransitionOutsideNaturalParentDiag "warning"
SFUnconditionalTransitionShadowingDiag "warning"
SFUndirectedBroadcastEventsDiag "warning"
SFTransitionActionBeforeConditionDiag "warning"
}
Simulink.HardwareCC {
$ObjectID 11
Version "1.12.1"
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
ProdBitPerFloat 32
ProdBitPerDouble 64
ProdBitPerPointer 32
ProdLargestAtomicInteger "Char"
ProdLargestAtomicFloat "None"
ProdIntDivRoundTo "Undefined"
ProdEndianess "Unspecified"
ProdWordSize 32
ProdShiftRightIntArith on
ProdHWDeviceType "32-bit Generic"
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
TargetBitPerFloat 32
TargetBitPerDouble 64
TargetBitPerPointer 32
TargetLargestAtomicInteger "Char"
TargetLargestAtomicFloat "None"
TargetShiftRightIntArith on
TargetIntDivRoundTo "Undefined"
TargetEndianess "Unspecified"
TargetWordSize 32
TargetTypeEmulationWarnSuppressLevel 0
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType "Specified"
TargetUnknown off
ProdEqTarget on
}
Simulink.ModelReferenceCC {
$ObjectID 12
Version "1.12.1"
UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
CheckModelReferenceTargetMessage "error"
EnableParallelModelReferenceBuilds off
ParallelModelReferenceErrorOnInvalidPool on
ParallelModelReferenceMATLABWorkerInit "None"
ModelReferenceNumInstancesAllowed "Multi"
PropagateVarSize "Infer from blocks in model"
ModelReferencePassRootInputsByReference on
ModelReferenceMinAlgLoopOccurrences off
PropagateSignalLabelsOutOfModel off
SupportModelReferenceSimTargetCustomCode off
}
Simulink.SFSimCC {
$ObjectID 13
Version "1.12.1"
SFSimEnableDebug on
SFSimOverflowDetection on
SFSimEcho on
SimBlas on
SimCtrlC on
SimExtrinsic on
SimIntegrity on
SimUseLocalCustomCode off
SimParseCustomCode on
SimBuildMode "sf_incremental_build"
}
Simulink.RTWCC {
$BackupClass "Simulink.RTWCC"
$ObjectID 14
Version "1.12.1"
Array {
Type "Cell"
Dimension 15
Cell "IncludeHyperlinkInReport"
Cell "GenerateTraceInfo"
Cell "GenerateTraceReport"
Cell "GenerateTraceReportSl"
Cell "GenerateTraceReportSf"
Cell "GenerateTraceReportEml"
Cell "PortableWordSizes"
Cell "GenerateWebview"
Cell "GenerateCodeMetricsReport"
Cell "GenerateCodeReplacementReport"
Cell "GenerateErtSFunction"
Cell "CreateSILPILBlock"
Cell "CodeExecutionProfiling"
Cell "CodeProfilingSaveOptions"
Cell "CodeProfilingInstrumentation"
PropName "DisabledProps"
}
SystemTargetFile "grt.tlc"
GenCodeOnly off
MakeCommand "make_rtw"
GenerateMakefile on
PackageGeneratedCodeAndArtifacts off
TemplateMakefile "grt_default_tmf"
GenerateReport off
SaveLog off
RTWVerbose on
RetainRTWFile off
ProfileTLC off
TLCDebug off
TLCCoverage off
TLCAssert off
ProcessScriptMode "Default"
ConfigurationMode "Optimized"
ConfigAtBuild off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
IncludeHyperlinkInReport off
LaunchReport off
PortableWordSizes off
GenerateErtSFunction off
CreateSILPILBlock "None"
CodeExecutionProfiling off
CodeExecutionProfileVariable "executionProfile"
CodeProfilingSaveOptions "SummaryOnly"
CodeProfilingInstrumentation off
TargetLang "C"
IncludeBusHierarchyInRTWFileBlockHierarchyMap off
IncludeERTFirstTime off
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml off
GenerateCodeInfo off
GenerateWebview off
GenerateCodeMetricsReport off
GenerateCodeReplacementReport off
RTWCompilerOptimization "Off"
CheckMdlBeforeBuild "Off"
CustomRebuildMode "OnUpdate"
Array {
Type "Handle"
Dimension 2
Simulink.CodeAppCC {
$ObjectID 15
Version "1.12.1"
Array {
Type "Cell"
Dimension 22
Cell "IgnoreCustomStorageClasses"
Cell "IgnoreTestpoints"
Cell "InsertBlockDesc"
Cell "InsertPolySpaceComments"
Cell "SFDataObjDesc"
Cell "MATLABFcnDesc"
Cell "SimulinkDataObjDesc"
Cell "DefineNamingRule"
Cell "SignalNamingRule"
Cell "ParamNamingRule"
Cell "InternalIdentifier"
Cell "InlinedPrmAccess"
Cell "CustomSymbolStr"
Cell "CustomSymbolStrGlobalVar"
Cell "CustomSymbolStrType"
Cell "CustomSymbolStrField"
Cell "CustomSymbolStrFcn"
Cell "CustomSymbolStrFcnArg"
Cell "CustomSymbolStrBlkIO"
Cell "CustomSymbolStrTmpVar"
Cell "CustomSymbolStrMacro"
Cell "ReqsInCode"
PropName "DisabledProps"
}
ForceParamTrailComments off
GenerateComments on
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
MaxIdLength 31
PreserveName off
PreserveNameWithParent off
ShowEliminatedStatement off
OperatorAnnotations off
IncAutoGenComments off
SimulinkDataObjDesc off
SFDataObjDesc off
MATLABFcnDesc off
IncDataTypeInIds off
MangleLength 1
CustomSymbolStrGlobalVar "$R$N$M"
CustomSymbolStrType "$N$R$M"
CustomSymbolStrField "$N$M"
CustomSymbolStrFcn "$R$N$M$F"
CustomSymbolStrFcnArg "rt$I$N$M"
CustomSymbolStrBlkIO "rtb_$N$M"
CustomSymbolStrTmpVar "$N$M"
CustomSymbolStrMacro "$R$N$M"
DefineNamingRule "None"
ParamNamingRule "None"
SignalNamingRule "None"
InsertBlockDesc off
InsertPolySpaceComments off
SimulinkBlockComments on
MATLABSourceComments off
EnableCustomComments off
InternalIdentifier "Classic"
InlinedPrmAccess "Literals"
ReqsInCode off
UseSimReservedNames off
}
Simulink.GRTTargetCC {
$BackupClass "Simulink.TargetCC"
$ObjectID 16
Version "1.12.1"
Array {
Type "Cell"
Dimension 15
Cell "GeneratePreprocessorConditionals"
Cell "IncludeMdlTerminateFcn"
Cell "CombineOutputUpdateFcns"
Cell "SuppressErrorStatus"
Cell "ERTCustomFileBanners"
Cell "GenerateSampleERTMain"
Cell "GenerateTestInterfaces"
Cell "ModelStepFunctionPrototypeControlCompliant"
Cell "CPPClassGenCompliant"
Cell "MultiInstanceERTCode"
Cell "PurelyIntegerCode"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
Cell "SupportNonInlinedSFcns"
PropName "DisabledProps"
}
TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
CodeReplacementLibrary "ANSI_C"
UtilityFuncGeneration "Auto"
ERTMultiwordTypeDef "System defined"
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
ConcurrentExecutionCompliant on
IncludeMdlTerminateFcn on
GeneratePreprocessorConditionals "Disable all"
CombineOutputUpdateFcns on
CombineSignalStateStructs off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
EnableShiftOperators on
ParenthesesLevel "Nominal"
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant off
AutosarCompliant off
GRTInterface off
UseMalloc off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
RTWCAPIRootIO off
GenerateASAP2 off
}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
ConfigPrmDlgPosition [ 1480, 285, 2360, 915 ]
}
PropName "ConfigurationSets"
}
ExplicitPartitioning off
BlockDefaults {
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
BlockRotation 0
BlockMirror off
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
MaskDefaults {
SelfModifiable "off"
IconFrame "on"
IconOpaque "on"
RunInitForIconRedraw "off"
IconRotate "none"
PortRotate "default"
IconUnits "autoscale"
}
MaskParameterDefaults {
Evaluate "on"
Tunable "on"
NeverSave "off"
Internal "off"
ReadOnly "off"
Enabled "on"
Visible "on"
ToolTip "on"
}
BlockParameterDefaults {
Block {
BlockType Constant
Value "1"
VectorParams1D on
SamplingMode "Sample based"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Inherit from 'Constant value'"
LockScale off
SampleTime "inf"
FramePeriod "inf"
PreserveConstantTs off
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParamMin "[]"
ParamMax "[]"
ParamDataTypeStr "Inherit: Same as input"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Inport
Port "1"
OutputFunctionCall off
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: auto"
LockScale off
BusOutputAsStruct off
PortDimensions "-1"
VarSizeSig "Inherit"
SampleTime "-1"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchInputForFeedbackSignals off
Interpolate on
}
Block {
BlockType Outport
Port "1"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: auto"
LockScale off
BusOutputAsStruct off
PortDimensions "-1"
VarSizeSig "Inherit"
SampleTime "-1"
SignalType "auto"
SamplingMode "auto"
SourceOfInitialOutputValue "Dialog"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Saturate
UpperLimitSource "Dialog"
UpperLimit "0.5"
LowerLimitSource "Dialog"
LowerLimit "-0.5"
LinearizeAsGain on
ZeroCross on
SampleTime "-1"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as input"
LockScale off
RndMeth "Floor"
}
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
DataTypeOverrideAppliesTo "AllNumericTypes"
MinMaxOverflowLogging "UseLocalSettings"
SFBlockType "NONE"
Variant off
GeneratePreprocessorConditionals off
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
AccumDataTypeStr "Inherit: Inherit via internal rule"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
}
System {
Name "ESD_LINEARIZATION_WITH_CHARGE_MASTER"
Location [323, 194, 1805, 985]
Open off
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
SIDHighWatermark "23"
Block {
BlockType SubSystem
Name "ESD_LIN_CHARGE_MASTER"
SID "1"
Ports [3, 1]
Position [230, 135, 335, 185]
ZOrder 43
BackgroundColor "orange"
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "ESD_LIN_CHARGE_MASTER"
Location [323, 194, 1805, 985]
Open on
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "bias"
SID "2"
Position [75, 218, 105, 232]
ZOrder 14
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "Control_Sig_In"
SID "3"
Position [70, 368, 100, 382]
ZOrder -1
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "Gain_Constant_In"
SID "17"
Position [75, 158, 105, 172]
ZOrder 19
Port "3"
IconDisplay "Port number"
}
Block {
BlockType Sum
Name "Add"
SID "4"
Ports [3, 1]
Position [1125, 136, 1150, 404]
ZOrder 3
Inputs "++-"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Constant
Name "Constant1"
SID "5"
Position [295, 427, 335, 463]
ZOrder 4
}
Block {
BlockType Constant
Name "Constant2"
SID "21"
Position [450, 162, 490, 198]
ZOrder 23
Value "4"
}
Block {
BlockType Product
Name "Divide"
SID "7"
Ports [2, 1]
Position [300, 347, 330, 378]
ZOrder 2
Inputs "/*"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide1"
SID "8"
Ports [2, 1]
Position [157, 300, 193, 335]
ZOrder 16
BlockRotation 270
BlockMirror on
NamePlacement "alternate"
Inputs "/*"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide2"
SID "18"
Ports [2, 1]
Position [390, 77, 420, 108]
ZOrder 20
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide3"
SID "20"
Ports [2, 1]
Position [540, 157, 570, 188]
ZOrder 22
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "EFF_CHARGE"
SID "16"
Tag "cdsEpicsIn"
Description "Purpose: \nCreate an E"
"PICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precision of 3..\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [0, 1]
Position [250, 45, 315, 75]
ZOrder 18
BackgroundColor "green"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
}
Block {
BlockType Gain
Name "Gain"
SID "9"
Position [760, 350, 790, 380]
ZOrder 10
Gain "2"
ParamDataTypeStr "Inherit: Inherit via internal rule"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product"
SID "10"
Ports [2, 1]
Position [1030, 342, 1060, 373]
ZOrder 13
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product1"
SID "11"
Ports [2, 1]
Position [215, 352, 245, 383]
ZOrder 17
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product2"
SID "19"
Ports [2, 1]
Position [475, 97, 505, 128]
ZOrder 21
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "SQRT"
SID "12"
Tag "cdsSqrt"
Ports [1, 1]
Position [920, 346, 950, 384]
ZOrder 12
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsSqrt/Subsystem"
SourceType "SubSystem"
}
Block {
BlockType Saturate
Name "Saturation"
SID "13"
Ports [1, 1]
Position [845, 350, 875, 380]
ZOrder 11
InputPortMap "u0"
UpperLimit "1e6"
LowerLimit "0"
}
Block {
BlockType Sum
Name "Sum"
SID "14"
Ports [4, 1]
Position [685, 345, 725, 385]
ZOrder 6
ShowName off
IconShape "round"
Inputs "|++++"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Outport
Name "Out"
SID "15"
Position [1195, 263, 1225, 277]
ZOrder -2
IconDisplay "Port number"
}
Line {
SrcBlock "Saturation"
SrcPort 1
DstBlock "SQRT"
DstPort 1
}
Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "Saturation"
DstPort 1
}
Line {
SrcBlock "Product1"
SrcPort 1
DstBlock "Divide"
DstPort 2
}
Line {
SrcBlock "Divide1"
SrcPort 1
Points [0, 20]
DstBlock "Product1"
DstPort 1
}
Line {
SrcBlock "Control_Sig_In"
SrcPort 1
DstBlock "Product1"
DstPort 2
}
Line {
SrcBlock "Gain_Constant_In"
SrcPort 1
Points [75, 0]
DstBlock "Divide1"
DstPort 2
}
Line {
SrcBlock "SQRT"
SrcPort 1
DstBlock "Product"
DstPort 2
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "Gain"
DstPort 1
}
Line {
SrcBlock "Add"
SrcPort 1
DstBlock "Out"
DstPort 1
}
Line {
SrcBlock "bias"
SrcPort 1
Points [55, 0]
Branch {
DstBlock "Divide1"
DstPort 1
}
Branch {
Points [103, 0]
Branch {
Points [0, -125]
DstBlock "Divide2"
DstPort 2
}
Branch {
Points [0, 130]
DstBlock "Divide"
DstPort 1
}
Branch {
Points [473, 0; 0, 45]
Branch {
DstBlock "Add"
DstPort 2
}
Branch {
Points [0, 61; 249, 0; 0, 19]
DstBlock "Product"
DstPort 1
}
}
}
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Add"
DstPort 3
}
Line {
SrcBlock "EFF_CHARGE"
SrcPort 1
Points [35, 0]
Branch {
Points [387, 0; 0, 120]
DstBlock "Add"
DstPort 1
}
Branch {
Points [0, 25]
DstBlock "Divide2"
DstPort 1
}
}
Line {
SrcBlock "Divide2"
SrcPort 1
Points [6, 0]
Branch {
Points [0, 10]
Branch {
Points [0, 15]
DstBlock "Product2"
DstPort 2
}
Branch {
DstBlock "Product2"
DstPort 1
}
}
Branch {
Points [0, -13; 250, 0]
DstBlock "Sum"
DstPort 1
}
}
Line {
SrcBlock "Product2"
SrcPort 1
Points [13, 0; 0, 50]
DstBlock "Divide3"
DstPort 1
}
Line {
SrcBlock "Constant2"
SrcPort 1
DstBlock "Divide3"
DstPort 2
}
Line {
SrcBlock "Divide"
SrcPort 1
Points [143, 0; 0, 24]
DstBlock "Sum"
DstPort 3
}
Line {
SrcBlock "Constant1"
SrcPort 1
Points [365, 0]
DstBlock "Sum"
DstPort 4
}
Line {
SrcBlock "Divide3"
SrcPort 1
Points [53, 0; 0, 190]
DstBlock "Sum"
DstPort 2
}
}
}
}
}
simulink_archive/simLink/FOUROSEM_DAMPED_STAGE_MASTER_WITH_DAMP_MODE.mdl 0 → 100644
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simulink_archive/simLink/FOUROSEM_STAGE_MASTER_OPLEV_TIDAL.mdl 0 → 100644
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simulink_archive/simLink/LONG_PULSE.c 0 → 100644
View file @ 81d2c40c
/*
Long Pulse. When receives an input value different from the previous input value,
the output goes to that value and the c code begins a counter.
It will remain at that initial input value until the counter finishes.
If the input value changes after that time, it will immediately transition.
If the input value changes before the counter finishes, it will ignore it until the counter finishes.
Threshold defined by model rate (in Hz) and wait time (in seconds).
datIn[0] = Input
datIn[1] = WaitTime (how many seconds to wait after receiving a 1
before outputting a 1)
datOut[0] = long pulse of input
*/
void LONG_PULSE(double *datIn, int nIn, double *datOut, int nOut)
{
static int isFirst = 1;
double input;
double WaitTime;
double ModelRate;
static double counter;
double threshold;
static double previous_output;
static int finished_counting;
input = datIn[0];
WaitTime = datIn[1];
ModelRate = FE_RATE;
threshold = WaitTime * ModelRate;
if (isFirst) { // Initialize counter for first run
isFirst = 0;
counter = 0;
previous_output = input;
}
if (counter > threshold) {
finished_counting = 1;
}
if (finished_counting == 1) {
if (previous_output != input) {
previous_output = input;
finished_counting = 0;
counter = 0;
}
} else {
counter++;
}
datOut[0] = previous_output;
} // end of long_pulse()
simulink_archive/simLink/QUAD_MASTER.mdl 0 → 100644
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simulink_archive/simLink/STATE_BIO_MASTER.mdl 0 → 100644
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simulink_archive/simLink/USER.mdl 0 → 100644
View file @ 81d2c40c
Library {
Name "USER"
Version 8.2
MdlSubVersion 0
SavedCharacterEncoding "UTF-8"
LibraryType "BlockLibrary"
SaveDefaultBlockParams on
ScopeRefreshTime 0.035000
OverrideScopeRefreshTime on
DisableAllScopes off
FPTRunName "Run 1"
MaxMDLFileLineLength 120
Object {
$PropName "BdWindowsInfo"
$ObjectID 1
$ClassName "Simulink.BDWindowsInfo"
Object {
$PropName "WindowsInfo"
$ObjectID 2
$ClassName "Simulink.WindowInfo"
IsActive [1]
Location [90.0, 166.0, 1591.0, 838.0]
Object {
$PropName "ModelBrowserInfo"
$ObjectID 3
$ClassName "Simulink.ModelBrowserInfo"
Visible [1]
DockPosition "Left"
Width [50]
Height [50]
Filter [9]
}
Object {
$PropName "ExplorerBarInfo"
$ObjectID 4
$ClassName "Simulink.ExplorerBarInfo"
Visible [1]
}
Object {
$PropName "EditorsInfo"
$ObjectID 5
$ClassName "Simulink.EditorInfo"
IsActive [1]
ViewObjType "SimulinkSubsys"
LoadSaveID "193"
Extents [1340.0, 643.0]
ZoomFactor [0.8]
Offset [-68.66671741674395, 962.35741171071277]
}
}
}
Created "Fri Dec 22 17:54:54 2017"
Creator "controls"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "controls"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Fri Dec 22 19:56:59 2017"
RTWModifiedTimeStamp 435873416
ModelVersionFormat "1.%<AutoIncrement:22>"
ConfigurationManager "none"
SampleTimeColors off
SampleTimeAnnotations off
LibraryLinkDisplay "all"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowDesignRanges off
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
ShowTestPointIcons on
ShowSignalResolutionIcons on
ShowViewerIcons on
SortedOrder off
ExecutionContextIcon off
ShowLinearizationAnnotations on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
SimulationMode "normal"
PauseTimes "5"
NumberOfSteps 1
SnapshotBufferSize 10
SnapshotInterval 10
NumberOfLastSnapshots 0
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
RecordCoverage off
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
CovForceBlockReductionOff on
CovEnableCumulative on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeReport off
CovReportOnPause on
CovModelRefEnable "Off"
CovExternalEMLEnable off
ExtModeBatchMode off
ExtModeEnableFloating on
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigDurationFloating "auto"
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
ShowModelReferenceBlockVersion off
ShowModelReferenceBlockIO off
Array {
Type "Handle"
Dimension 1
Simulink.ConfigSet {
$ObjectID 6
Version "1.13.1"
Array {
Type "Handle"
Dimension 8
Simulink.SolverCC {
$ObjectID 7
Version "1.13.1"
StartTime "0.0"
StopTime "10.0"
AbsTol "auto"
FixedStep "auto"
InitialStep "auto"
MaxNumMinSteps "-1"
MaxOrder 5
ZcThreshold "auto"
ConsecutiveZCsStepRelTol "10*128*eps"
MaxConsecutiveZCs "1000"
ExtrapolationOrder 4
NumberNewtonIterations 1
MaxStep "auto"
MinStep "auto"
MaxConsecutiveMinStep "1"
RelTol "1e-3"
SolverMode "Auto"
EnableConcurrentExecution off
ConcurrentTasks off
Solver "ode45"
SolverName "ode45"
SolverJacobianMethodControl "auto"
ShapePreserveControl "DisableAll"
ZeroCrossControl "UseLocalSettings"
ZeroCrossAlgorithm "Nonadaptive"
AlgebraicLoopSolver "TrustRegion"
SolverResetMethod "Fast"
PositivePriorityOrder off
AutoInsertRateTranBlk off
SampleTimeConstraint "Unconstrained"
InsertRTBMode "Whenever possible"
}
Simulink.DataIOCC {
$ObjectID 8
Version "1.13.1"
Decimation "1"
ExternalInput "[t, u]"
FinalStateName "xFinal"
InitialState "xInitial"
LimitDataPoints on
MaxDataPoints "1000"
LoadExternalInput off
LoadInitialState off
SaveFinalState off
SaveCompleteFinalSimState off
SaveFormat "Array"
SignalLoggingSaveFormat "Dataset"
SaveOutput on
SaveState off
SignalLogging on
DSMLogging on
InspectSignalLogs off
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName "xout"
TimeSaveName "tout"
OutputSaveName "yout"
SignalLoggingName "logsout"
DSMLoggingName "dsmout"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
ReturnWorkspaceOutputsName "out"
Refine "1"
}
Simulink.OptimizationCC {
$ObjectID 9
Version "1.13.1"
Array {
Type "Cell"
Dimension 8
Cell "BooleansAsBitfields"
Cell "PassReuseOutputArgsAs"
Cell "PassReuseOutputArgsThreshold"
Cell "ZeroExternalMemoryAtStartup"
Cell "ZeroInternalMemoryAtStartup"
Cell "OptimizeModelRefInitCode"
Cell "NoFixptDivByZeroProtection"
Cell "UseSpecifiedMinMax"
PropName "DisabledProps"
}
BlockReduction on
BooleanDataType on
ConditionallyExecuteInputs on
InlineParams off
UseIntDivNetSlope off
UseFloatMulNetSlope off
DefaultUnderspecifiedDataType "double"
UseSpecifiedMinMax off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
EnhancedBackFolding off
StrengthReduction off
ExpressionFolding on
BooleansAsBitfields off
BitfieldContainerType "uint_T"
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs "Structure reference"
ExpressionDepthLimit 128
FoldNonRolledExpr on
LocalBlockOutputs on
RollThreshold 5
SystemCodeInlineAuto off
StateBitsets off
DataBitsets off
ActiveStateOutputEnumStorageType "Native Integer"
UseTempVars off
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero off
NoFixptDivByZeroProtection off
EfficientFloat2IntCast off
EfficientMapNaN2IntZero on
OptimizeModelRefInitCode off
LifeSpan "inf"
MaxStackSize "Inherit from target"
BufferReusableBoundary on
SimCompilerOptimization "Off"
AccelVerboseBuild off
ParallelExecutionInRapidAccelerator on
}
Simulink.DebuggingCC {
$ObjectID 10
Version "1.13.1"
RTPrefix "error"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
SignalInfNanChecking "none"
SignalRangeChecking "none"
ReadBeforeWriteMsg "UseLocalSettings"
WriteAfterWriteMsg "UseLocalSettings"
WriteAfterReadMsg "UseLocalSettings"
AlgebraicLoopMsg "warning"
ArtificialAlgebraicLoopMsg "warning"
SaveWithDisabledLinksMsg "warning"
SaveWithParameterizedLinksMsg "warning"
CheckSSInitialOutputMsg on
UnderspecifiedInitializationDetection "Classic"
MergeDetectMultiDrivingBlocksExec "none"
CheckExecutionContextPreStartOutputMsg off
CheckExecutionContextRuntimeOutputMsg off
SignalResolutionControl "UseLocalSettings"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
TimeAdjustmentMsg "none"
MaxConsecutiveZCsMsg "error"
MaskedZcDiagnostic "warning"
IgnoredZcDiagnostic "warning"
SolverPrmCheckMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskDSMMsg "error"
MultiTaskCondExecSysMsg "error"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
TasksWithSamePriorityMsg "warning"
SigSpecEnsureSampleTimeMsg "warning"
CheckMatrixSingularityMsg "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterUnderflowMsg "none"
ParameterPrecisionLossMsg "warning"
ParameterTunabilityLossMsg "warning"
FixptConstUnderflowMsg "none"
FixptConstOverflowMsg "none"
FixptConstPrecisionLossMsg "none"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
FcnCallInpInsideContextMsg "EnableAllAsError"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SFcnCompatibilityMsg "none"
FrameProcessingCompatibilityMsg "warning"
UniqueDataStoreMsg "none"
BusObjectLabelMismatch "warning"
RootOutportRequireBusObject "warning"
AssertControl "UseLocalSettings"
EnableOverflowDetection off
ModelReferenceIOMsg "none"
ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"
ModelReferenceVersionMismatchMessage "none"
ModelReferenceIOMismatchMessage "none"
ModelReferenceCSMismatchMessage "none"
UnknownTsInhSupMsg "warning"
ModelReferenceDataLoggingMessage "warning"
ModelReferenceSymbolNameMessage "warning"
ModelReferenceExtraNoncontSigs "error"
StateNameClashWarn "none"
SimStateInterfaceChecksumMismatchMsg "warning"
SimStateOlderReleaseMsg "error"
InitInArrayFormatMsg "warning"
StrictBusMsg "ErrorLevel1"
BusNameAdapt "WarnAndRepair"
NonBusSignalsTreatedAsBus "none"
LoggingUnavailableSignals "error"
BlockIODiagnostic "none"
SFUnusedDataAndEventsDiag "warning"
SFUnexpectedBacktrackingDiag "warning"
SFInvalidInputDataAccessInChartInitDiag "warning"
SFNoUnconditionalDefaultTransitionDiag "warning"
SFTransitionOutsideNaturalParentDiag "warning"
SFUnconditionalTransitionShadowingDiag "warning"
SFUndirectedBroadcastEventsDiag "warning"
SFTransitionActionBeforeConditionDiag "warning"
}
Simulink.HardwareCC {
$ObjectID 11
Version "1.13.1"
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
ProdBitPerLongLong 64
ProdBitPerFloat 32
ProdBitPerDouble 64
ProdBitPerPointer 32
ProdLargestAtomicInteger "Char"
ProdLargestAtomicFloat "None"
ProdIntDivRoundTo "Undefined"
ProdEndianess "Unspecified"
ProdWordSize 32
ProdShiftRightIntArith on
ProdLongLongMode off
ProdHWDeviceType "32-bit Generic"
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
TargetBitPerLongLong 64
TargetBitPerFloat 32
TargetBitPerDouble 64
TargetBitPerPointer 32
TargetLargestAtomicInteger "Char"
TargetLargestAtomicFloat "None"
TargetShiftRightIntArith on
TargetLongLongMode off
TargetIntDivRoundTo "Undefined"
TargetEndianess "Unspecified"
TargetWordSize 32
TargetTypeEmulationWarnSuppressLevel 0
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType "Specified"
TargetUnknown off
ProdEqTarget on
}
Simulink.ModelReferenceCC {
$ObjectID 12
Version "1.13.1"
UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
CheckModelReferenceTargetMessage "error"
EnableParallelModelReferenceBuilds off
ParallelModelReferenceErrorOnInvalidPool on
ParallelModelReferenceMATLABWorkerInit "None"
ModelReferenceNumInstancesAllowed "Multi"
PropagateVarSize "Infer from blocks in model"
ModelReferencePassRootInputsByReference on
ModelReferenceMinAlgLoopOccurrences off
PropagateSignalLabelsOutOfModel off
SupportModelReferenceSimTargetCustomCode off
}
Simulink.SFSimCC {
$ObjectID 13
Version "1.13.1"
SFSimEnableDebug on
SFSimOverflowDetection on
SFSimEcho on
SimBlas on
SimCtrlC on
SimExtrinsic on
SimIntegrity on
SimUseLocalCustomCode off
SimParseCustomCode on
SimBuildMode "sf_incremental_build"
SimGenImportedTypeDefs off
}
Simulink.RTWCC {
$BackupClass "Simulink.RTWCC"
$ObjectID 14
Version "1.13.1"
Array {
Type "Cell"
Dimension 15
Cell "IncludeHyperlinkInReport"
Cell "GenerateTraceInfo"
Cell "GenerateTraceReport"
Cell "GenerateTraceReportSl"
Cell "GenerateTraceReportSf"
Cell "GenerateTraceReportEml"
Cell "PortableWordSizes"
Cell "GenerateWebview"
Cell "GenerateCodeMetricsReport"
Cell "GenerateCodeReplacementReport"
Cell "GenerateErtSFunction"
Cell "CreateSILPILBlock"
Cell "CodeExecutionProfiling"
Cell "CodeProfilingSaveOptions"
Cell "CodeProfilingInstrumentation"
PropName "DisabledProps"
}
SystemTargetFile "grt.tlc"
TLCOptions ""
GenCodeOnly off
MakeCommand "make_rtw"
GenerateMakefile on
PackageGeneratedCodeAndArtifacts off
PackageName ""
TemplateMakefile "grt_default_tmf"
PostCodeGenCommand ""
Description ""
GenerateReport off
SaveLog off
RTWVerbose on
RetainRTWFile off
ProfileTLC off
TLCDebug off
TLCCoverage off
TLCAssert off
ProcessScriptMode "Default"
ConfigurationMode "Optimized"
ProcessScript ""
ConfigurationScript ""
ConfigAtBuild off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
CustomSourceCode ""
CustomHeaderCode ""
CustomInclude ""
CustomSource ""
CustomLibrary ""
CustomInitializer ""
CustomTerminator ""
Toolchain "Automatically locate an installed toolchain"
BuildConfiguration "Faster Builds"
IncludeHyperlinkInReport off
LaunchReport off
PortableWordSizes off
GenerateErtSFunction off
CreateSILPILBlock "None"
CodeExecutionProfiling off
CodeExecutionProfileVariable "executionProfile"
CodeProfilingSaveOptions "SummaryOnly"
CodeProfilingInstrumentation off
SILDebugging off
TargetLang "C"
IncludeBusHierarchyInRTWFileBlockHierarchyMap off
IncludeERTFirstTime off
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml off
GenerateCodeInfo off
GenerateWebview off
GenerateCodeMetricsReport off
GenerateCodeReplacementReport off
RTWCompilerOptimization "Off"
RTWCustomCompilerOptimizations ""
CheckMdlBeforeBuild "Off"
CustomRebuildMode "OnUpdate"
DataInitializer ""
SharedConstantsCachingThreshold 1024
Array {
Type "Handle"
Dimension 2
Simulink.CodeAppCC {
$ObjectID 15
Version "1.13.1"
Array {
Type "Cell"
Dimension 23
Cell "IgnoreCustomStorageClasses"
Cell "IgnoreTestpoints"
Cell "InsertBlockDesc"
Cell "InsertPolySpaceComments"
Cell "SFDataObjDesc"
Cell "MATLABFcnDesc"
Cell "SimulinkDataObjDesc"
Cell "DefineNamingRule"
Cell "SignalNamingRule"
Cell "ParamNamingRule"
Cell "InternalIdentifier"
Cell "InlinedPrmAccess"
Cell "CustomSymbolStr"
Cell "CustomSymbolStrGlobalVar"
Cell "CustomSymbolStrType"
Cell "CustomSymbolStrField"
Cell "CustomSymbolStrFcn"
Cell "CustomSymbolStrFcnArg"
Cell "CustomSymbolStrBlkIO"
Cell "CustomSymbolStrTmpVar"
Cell "CustomSymbolStrMacro"
Cell "CustomSymbolStrUtil"
Cell "ReqsInCode"
PropName "DisabledProps"
}
ForceParamTrailComments off
GenerateComments on
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
MaxIdLength 31
PreserveName off
PreserveNameWithParent off
ShowEliminatedStatement off
OperatorAnnotations off
IncAutoGenComments off
SimulinkDataObjDesc off
SFDataObjDesc off
MATLABFcnDesc off
IncDataTypeInIds off
MangleLength 1
CustomSymbolStrGlobalVar "$R$N$M"
CustomSymbolStrType "$N$R$M_T"
CustomSymbolStrField "$N$M"
CustomSymbolStrFcn "$R$N$M$F"
CustomSymbolStrFcnArg "rt$I$N$M"
CustomSymbolStrBlkIO "rtb_$N$M"
CustomSymbolStrTmpVar "$N$M"
CustomSymbolStrMacro "$R$N$M"
CustomSymbolStrUtil "$N$C"
DefineNamingRule "None"
ParamNamingRule "None"
SignalNamingRule "None"
InsertBlockDesc off
InsertPolySpaceComments off
SimulinkBlockComments on
MATLABSourceComments off
EnableCustomComments off
InternalIdentifier "Shortened"
InlinedPrmAccess "Literals"
ReqsInCode off
UseSimReservedNames off
}
Simulink.GRTTargetCC {
$BackupClass "Simulink.TargetCC"
$ObjectID 16
Version "1.13.1"
Array {
Type "Cell"
Dimension 15
Cell "GeneratePreprocessorConditionals"
Cell "IncludeMdlTerminateFcn"
Cell "CombineOutputUpdateFcns"
Cell "SuppressErrorStatus"
Cell "ERTCustomFileBanners"
Cell "GenerateSampleERTMain"
Cell "GenerateTestInterfaces"
Cell "ModelStepFunctionPrototypeControlCompliant"
Cell "CPPClassGenCompliant"
Cell "GenerateAllocFcn"
Cell "PurelyIntegerCode"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
Cell "SupportNonInlinedSFcns"
PropName "DisabledProps"
}
TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
CodeReplacementLibrary "ANSI_C"
UtilityFuncGeneration "Auto"
ERTMultiwordTypeDef "System defined"
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
ConcurrentExecutionCompliant on
IncludeMdlTerminateFcn on
GeneratePreprocessorConditionals "Disable all"
CombineOutputUpdateFcns on
CombineSignalStateStructs off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
EnableShiftOperators on
ParenthesesLevel "Nominal"
MATLABClassNameForMDSCustomization "Simulink.SoftwareTarget.GRTCustomization"
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant off
AutosarCompliant off
GRTInterface off
GenerateAllocFcn off
UseMalloc off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
RTWCAPIRootIO off
GenerateASAP2 off
}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
ConfigPrmDlgPosition [ 420, 220, 1500, 860 ]
}
PropName "ConfigurationSets"
}
ExplicitPartitioning off
BlockDefaults {
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
BlockRotation 0
BlockMirror off
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
MaskDefaults {
SelfModifiable "off"
IconFrame "on"
IconOpaque "on"
RunInitForIconRedraw "off"
IconRotate "none"
PortRotate "default"
IconUnits "autoscale"
}
MaskParameterDefaults {
Evaluate "on"
Tunable "on"
NeverSave "off"
Internal "off"
ReadOnly "off"
Enabled "on"
Visible "on"
ToolTip "on"
}
BlockParameterDefaults {
Block {
BlockType Ground
}
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
FunctionInterfaceSpec "void_void"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
DataTypeOverrideAppliesTo "AllNumericTypes"
MinMaxOverflowLogging "UseLocalSettings"
SFBlockType "NONE"
Variant off
GeneratePreprocessorConditionals off
ContentPreviewEnabled off
}
Block {
BlockType Terminator
}
}
System {
Name "USER"
Location [90, 166, 1681, 1004]
Open off
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
SIDHighWatermark "490"
Block {
BlockType SubSystem
Name "USER0"
SID "193"
Ports []
Position [20, 20, 60, 80]
ZOrder 3792
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "USER0"
Location [90, 166, 1681, 1004]
Open on
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "80"
Block {
BlockType Reference
Name "ADC0_0_3"
SID "437"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [75, 1130, 150, 1160]
ZOrder 3760
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ADC0_12_15"
SID "444"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [75, 1370, 150, 1400]
ZOrder 3769
BackgroundColor "[0.419608, 0.588235, 0.239216]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ADC0_16_19"
SID "449"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [335, 1130, 410, 1160]
ZOrder 3772
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ADC0_20_23"
SID "451"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [335, 1210, 410, 1240]
ZOrder 3775
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ADC0_24_27"
SID "452"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [335, 1290, 410, 1320]
ZOrder 3778
BackgroundColor "[0.419608, 0.588235, 0.239216]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ADC0_28_31"
SID "450"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [335, 1370, 410, 1400]
ZOrder 3781
BackgroundColor "[0.419608, 0.588235, 0.239216]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ADC0_4_7"
SID "440"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [75, 1210, 150, 1240]
ZOrder 3763
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "ADC0_8_11"
SID "443"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [75, 1290, 150, 1320]
ZOrder 3766
BackgroundColor "[0.419608, 0.588235, 0.239216]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "BIO0"
SID "482"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [1080, 1130, 1155, 1160]
ZOrder 3805
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "BIO1"
SID "483"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [1080, 1210, 1155, 1240]
ZOrder 3808
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "BO0"
SID "473"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [835, 1130, 910, 1160]
ZOrder 3796
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "BO1"
SID "476"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [835, 1210, 910, 1240]
ZOrder 3799
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "BO2"
SID "479"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [835, 1290, 910, 1320]
ZOrder 3802
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "DAC0_0_3"
SID "461"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [585, 1130, 660, 1160]
ZOrder 3784
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "DAC0_12_15"
SID "462"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [585, 1370, 660, 1400]
ZOrder 3793
BackgroundColor "[0.419608, 0.588235, 0.239216]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "DAC0_4_7"
SID "463"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [585, 1210, 660, 1240]
ZOrder 3787
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "DAC0_8_11"
SID "464"
Tag "cdsEpicsBinIn"
Description "Purpose: \nCreate an EPI"
"CS binary (0 or 1) input channel to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is binary input (bi Epics record type).\n "
" \nUsage: "
" \nName the part with the desired EPICS channel name. "
" "
Ports [1, 1]
Position [585, 1290, 660, 1320]
ZOrder 3790
BackgroundColor "[0.419608, 0.588235, 0.239216]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.5"
SourceBlock "cdsEpicsBinIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Ground
Name "Ground1"
SID "438"
Position [20, 1135, 40, 1155]
ZOrder 3759
}
Block {
BlockType Ground
Name "Ground10"
SID "466"
Position [530, 1215, 550, 1235]
ZOrder 3786
}
Block {
BlockType Ground
Name "Ground11"
SID "467"
Position [530, 1295, 550, 1315]
ZOrder 3789
}
Block {
BlockType Ground
Name "Ground12"
SID "468"
Position [530, 1375, 550, 1395]
ZOrder 3792
}
Block {
BlockType Ground
Name "Ground13"
SID "474"
Position [780, 1135, 800, 1155]
ZOrder 3795
}
Block {
BlockType Ground
Name "Ground14"
SID "477"
Position [780, 1215, 800, 1235]
ZOrder 3798
}
Block {
BlockType Ground
Name "Ground15"
SID "480"
Position [780, 1295, 800, 1315]
ZOrder 3801
}
Block {
BlockType Ground
Name "Ground16"
SID "484"
Position [1025, 1135, 1045, 1155]
ZOrder 3804
}
Block {
BlockType Ground
Name "Ground17"
SID "485"
Position [1025, 1215, 1045, 1235]
ZOrder 3807
}
Block {
BlockType Ground
Name "Ground18"
SID "490"
Position [20, 1040, 40, 1060]
ZOrder 3812
}
Block {
BlockType Ground
Name "Ground2"
SID "441"
Position [20, 1215, 40, 1235]
ZOrder 3762
}
Block {
BlockType Ground
Name "Ground3"
SID "445"
Position [20, 1295, 40, 1315]
ZOrder 3765
}
Block {
BlockType Ground
Name "Ground4"
SID "446"
Position [20, 1375, 40, 1395]
ZOrder 3768
}
Block {
BlockType Ground
Name "Ground5"
SID "453"
Position [280, 1135, 300, 1155]
ZOrder 3771
}
Block {
BlockType Ground
Name "Ground6"
SID "454"
Position [280, 1215, 300, 1235]
ZOrder 3774
}
Block {
BlockType Ground
Name "Ground7"
SID "455"
Position [280, 1295, 300, 1315]
ZOrder 3777
}
Block {
BlockType Ground
Name "Ground8"
SID "456"
Position [280, 1375, 300, 1395]
ZOrder 3780
}
Block {
BlockType Ground
Name "Ground9"
SID "465"
Position [530, 1135, 550, 1155]
ZOrder 3783
}
Block {
BlockType Reference
Name "NAME"
SID "489"
Tag "cdsEpicsStringIn"
Description "cdsEpicsStringIn"
Ports [1]
Position [100, 1035, 150, 1065]
ZOrder 3811
BackgroundColor "[0.000000, 0.501961, 0.250980]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.3"
SourceBlock "cdsEpicsStringIn/EpicsStringIn"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Terminator
Name "Terminator"
SID "439"
Position [180, 1135, 200, 1155]
ZOrder 3761
}
Block {
BlockType Terminator
Name "Terminator1"
SID "442"
Position [180, 1215, 200, 1235]
ZOrder 3764
}
Block {
BlockType Terminator
Name "Terminator10"
SID "471"
Position [690, 1295, 710, 1315]
ZOrder 3791
}
Block {
BlockType Terminator
Name "Terminator11"
SID "472"
Position [690, 1375, 710, 1395]
ZOrder 3794
}
Block {
BlockType Terminator
Name "Terminator12"
SID "475"
Position [940, 1135, 960, 1155]
ZOrder 3797
}
Block {
BlockType Terminator
Name "Terminator13"
SID "478"
Position [940, 1215, 960, 1235]
ZOrder 3800
}
Block {
BlockType Terminator
Name "Terminator14"
SID "481"
Position [940, 1295, 960, 1315]
ZOrder 3803
}
Block {
BlockType Terminator
Name "Terminator15"
SID "486"
Position [1185, 1135, 1205, 1155]
ZOrder 3806
}
Block {
BlockType Terminator
Name "Terminator16"
SID "487"
Position [1185, 1215, 1205, 1235]
ZOrder 3809
}
Block {
BlockType Terminator
Name "Terminator2"
SID "447"
Position [180, 1295, 200, 1315]
ZOrder 3767
}
Block {
BlockType Terminator
Name "Terminator3"
SID "448"
Position [180, 1375, 200, 1395]
ZOrder 3770
}
Block {
BlockType Terminator
Name "Terminator4"
SID "457"
Position [440, 1135, 460, 1155]
ZOrder 3773
}
Block {
BlockType Terminator
Name "Terminator5"
SID "458"
Position [440, 1215, 460, 1235]
ZOrder 3776
}
Block {
BlockType Terminator
Name "Terminator6"
SID "459"
Position [440, 1295, 460, 1315]
ZOrder 3779
}
Block {
BlockType Terminator
Name "Terminator7"
SID "460"
Position [440, 1375, 460, 1395]
ZOrder 3782
}
Block {
BlockType Terminator
Name "Terminator8"
SID "469"
Position [690, 1135, 710, 1155]
ZOrder 3785
}
Block {
BlockType Terminator
Name "Terminator9"
SID "470"
Position [690, 1215, 710, 1235]
ZOrder 3788
}
Line {
ZOrder 127
SrcBlock "Ground1"
SrcPort 1
DstBlock "ADC0_0_3"
DstPort 1
}
Line {
ZOrder 128
SrcBlock "ADC0_0_3"
SrcPort 1
DstBlock "Terminator"
DstPort 1
}
Line {
ZOrder 129
SrcBlock "Ground2"
SrcPort 1
DstBlock "ADC0_4_7"
DstPort 1
}
Line {
ZOrder 130
SrcBlock "ADC0_4_7"
SrcPort 1
DstBlock "Terminator1"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 131
SrcBlock "Ground3"
SrcPort 1
DstBlock "ADC0_8_11"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 132
SrcBlock "ADC0_8_11"
SrcPort 1
DstBlock "Terminator2"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 133
SrcBlock "Ground4"
SrcPort 1
DstBlock "ADC0_12_15"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 134
SrcBlock "ADC0_12_15"
SrcPort 1
DstBlock "Terminator3"
DstPort 1
}
Line {
ZOrder 139
SrcBlock "Ground5"
SrcPort 1
DstBlock "ADC0_16_19"
DstPort 1
}
Line {
ZOrder 140
SrcBlock "ADC0_16_19"
SrcPort 1
DstBlock "Terminator4"
DstPort 1
}
Line {
ZOrder 141
SrcBlock "Ground6"
SrcPort 1
DstBlock "ADC0_20_23"
DstPort 1
}
Line {
ZOrder 142
SrcBlock "ADC0_20_23"
SrcPort 1
DstBlock "Terminator5"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 143
SrcBlock "Ground7"
SrcPort 1
DstBlock "ADC0_24_27"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 144
SrcBlock "ADC0_24_27"
SrcPort 1
DstBlock "Terminator6"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 145
SrcBlock "Ground8"
SrcPort 1
DstBlock "ADC0_28_31"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 146
SrcBlock "ADC0_28_31"
SrcPort 1
DstBlock "Terminator7"
DstPort 1
}
Line {
ZOrder 147
SrcBlock "Ground9"
SrcPort 1
DstBlock "DAC0_0_3"
DstPort 1
}
Line {
ZOrder 148
SrcBlock "DAC0_0_3"
SrcPort 1
DstBlock "Terminator8"
DstPort 1
}
Line {
ZOrder 149
SrcBlock "Ground10"
SrcPort 1
DstBlock "DAC0_4_7"
DstPort 1
}
Line {
ZOrder 150
SrcBlock "DAC0_4_7"
SrcPort 1
DstBlock "Terminator9"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 151
SrcBlock "Ground11"
SrcPort 1
DstBlock "DAC0_8_11"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 152
SrcBlock "DAC0_8_11"
SrcPort 1
DstBlock "Terminator10"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 153
SrcBlock "Ground12"
SrcPort 1
DstBlock "DAC0_12_15"
DstPort 1
}
Line {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
ZOrder 154
SrcBlock "DAC0_12_15"
SrcPort 1
DstBlock "Terminator11"
DstPort 1
}
Line {
ZOrder 155
SrcBlock "Ground13"
SrcPort 1
DstBlock "BO0"
DstPort 1
}
Line {
ZOrder 156
SrcBlock "BO0"
SrcPort 1
DstBlock "Terminator12"
DstPort 1
}
Line {
ZOrder 157
SrcBlock "Ground14"
SrcPort 1
DstBlock "BO1"
DstPort 1
}
Line {
ZOrder 158
SrcBlock "BO1"
SrcPort 1
DstBlock "Terminator13"
DstPort 1
}
Line {
ZOrder 159
SrcBlock "Ground15"
SrcPort 1
DstBlock "BO2"
DstPort 1
}
Line {
ZOrder 160
SrcBlock "BO2"
SrcPort 1
DstBlock "Terminator14"
DstPort 1
}
Line {
ZOrder 161
SrcBlock "Ground16"
SrcPort 1
DstBlock "BIO0"
DstPort 1
}
Line {
ZOrder 162
SrcBlock "BIO0"
SrcPort 1
DstBlock "Terminator15"
DstPort 1
}
Line {
ZOrder 163
SrcBlock "Ground17"
SrcPort 1
DstBlock "BIO1"
DstPort 1
}
Line {
ZOrder 164
SrcBlock "BIO1"
SrcPort 1
DstBlock "Terminator16"
DstPort 1
}
Line {
ZOrder 165
SrcBlock "Ground18"
SrcPort 1
DstBlock "NAME"
DstPort 1
}
}
}
}
}
simulink_archive/simLink/k10519.mdl 0 → 100644
View file @ 81d2c40c
Model {
Name "k10519"
Version 8.2
MdlSubVersion 0
SavedCharacterEncoding "UTF-8"
GraphicalInterface {
NumRootInports 0
NumRootOutports 0
ParameterArgumentNames ""
ComputedModelVersion "1.8"
NumModelReferences 0
NumTestPointedSignals 0
}
SaveDefaultBlockParams on
ScopeRefreshTime 0.035000
OverrideScopeRefreshTime on
DisableAllScopes off
DataTypeOverride "UseLocalSettings"
DataTypeOverrideAppliesTo "AllNumericTypes"
MinMaxOverflowLogging "UseLocalSettings"
MinMaxOverflowArchiveMode "Overwrite"
FPTRunName "Run 1"
MaxMDLFileLineLength 120
Object {
$PropName "BdWindowsInfo"
$ObjectID 1
$ClassName "Simulink.BDWindowsInfo"
Object {
$PropName "WindowsInfo"
$ObjectID 2
$ClassName "Simulink.WindowInfo"
IsActive [1]
Location [-10.0, 2180.0, 2580.0, 1037.0]
Object {
$PropName "ModelBrowserInfo"
$ObjectID 3
$ClassName "Simulink.ModelBrowserInfo"
Visible [1]
DockPosition "Left"
Width [50]
Height [50]
Filter [9]
}
Object {
$PropName "ExplorerBarInfo"
$ObjectID 4
$ClassName "Simulink.ExplorerBarInfo"
Visible [0]
}
Array {
Type "Simulink.EditorInfo"
Dimension 2
Object {
$ObjectID 5
IsActive [1]
ViewObjType "SimulinkTopLevel"
LoadSaveID "0"
Extents [2329.0, 865.0]
ZoomFactor [1.25]
Offset [-329.53036729438372, 4926.1793973042286]
}
Object {
$ObjectID 6
IsActive [0]
ViewObjType "SimulinkSubsys"
LoadSaveID "24"
Extents [2329.0, 865.0]
ZoomFactor [1.0]
Offset [0.0, 0.0]
}
PropName "EditorsInfo"
}
}
}
Created "Thu May 19 15:54:51 2022"
Creator "controls"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "controls"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Thu May 19 17:02:42 2022"
RTWModifiedTimeStamp 574880560
ModelVersionFormat "1.%<AutoIncrement:8>"
ConfigurationManager "none"
SampleTimeColors off
SampleTimeAnnotations off
LibraryLinkDisplay "disabled"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowDesignRanges off
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
ShowTestPointIcons on
ShowSignalResolutionIcons on
ShowViewerIcons on
SortedOrder off
ExecutionContextIcon off
ShowLinearizationAnnotations on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
SimulationMode "normal"
PauseTimes "5"
NumberOfSteps 1
SnapshotBufferSize 10
SnapshotInterval 10
NumberOfLastSnapshots 0
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
Object {
$PropName "DataLoggingOverride"
$ObjectID 7
$ClassName "Simulink.SimulationData.ModelLoggingInfo"
model_ "k10519"
overrideMode_ [0.0]
Array {
Type "Cell"
Dimension 1
Cell "k10519"
PropName "logAsSpecifiedByModels_"
}
Array {
Type "Cell"
Dimension 1
Cell []
PropName "logAsSpecifiedByModelsSSIDs_"
}
}
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
CovForceBlockReductionOff on
CovEnableCumulative on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeVarName "covCumulativeData"
CovCumulativeReport off
CovReportOnPause on
CovModelRefEnable "Off"
CovExternalEMLEnable off
ExtModeBatchMode off
ExtModeEnableFloating on
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigDurationFloating "auto"
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
BufferReuse on
ShowModelReferenceBlockVersion off
ShowModelReferenceBlockIO off
Array {
Type "Handle"
Dimension 1
Simulink.ConfigSet {
$ObjectID 8
Version "1.13.1"
Array {
Type "Handle"
Dimension 8
Simulink.SolverCC {
$ObjectID 9
Version "1.13.1"
StartTime "0.0"
StopTime "10.0"
AbsTol "auto"
FixedStep "auto"
InitialStep "auto"
MaxNumMinSteps "-1"
MaxOrder 5
ZcThreshold "auto"
ConsecutiveZCsStepRelTol "10*128*eps"
MaxConsecutiveZCs "1000"
ExtrapolationOrder 4
NumberNewtonIterations 1
MaxStep "auto"
MinStep "auto"
MaxConsecutiveMinStep "1"
RelTol "1e-3"
SolverMode "Auto"
EnableConcurrentExecution off
ConcurrentTasks off
Solver "ode45"
SolverName "ode45"
SolverJacobianMethodControl "auto"
ShapePreserveControl "DisableAll"
ZeroCrossControl "UseLocalSettings"
ZeroCrossAlgorithm "Nonadaptive"
AlgebraicLoopSolver "TrustRegion"
SolverResetMethod "Fast"
PositivePriorityOrder off
AutoInsertRateTranBlk off
SampleTimeConstraint "Unconstrained"
InsertRTBMode "Whenever possible"
}
Simulink.DataIOCC {
$ObjectID 10
Version "1.13.1"
Decimation "1"
ExternalInput "[t, u]"
FinalStateName "xFinal"
InitialState "xInitial"
LimitDataPoints on
MaxDataPoints "1000"
LoadExternalInput off
LoadInitialState off
SaveFinalState off
SaveCompleteFinalSimState off
SaveFormat "Array"
SignalLoggingSaveFormat "Dataset"
SaveOutput on
SaveState off
SignalLogging on
DSMLogging on
InspectSignalLogs off
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName "xout"
TimeSaveName "tout"
OutputSaveName "yout"
SignalLoggingName "logsout"
DSMLoggingName "dsmout"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
ReturnWorkspaceOutputsName "out"
Refine "1"
}
Simulink.OptimizationCC {
$ObjectID 11
Version "1.13.1"
Array {
Type "Cell"
Dimension 8
Cell "BooleansAsBitfields"
Cell "PassReuseOutputArgsAs"
Cell "PassReuseOutputArgsThreshold"
Cell "ZeroExternalMemoryAtStartup"
Cell "ZeroInternalMemoryAtStartup"
Cell "OptimizeModelRefInitCode"
Cell "NoFixptDivByZeroProtection"
Cell "UseSpecifiedMinMax"
PropName "DisabledProps"
}
BlockReduction on
BooleanDataType on
ConditionallyExecuteInputs on
InlineParams off
UseIntDivNetSlope off
UseFloatMulNetSlope off
DefaultUnderspecifiedDataType "double"
UseSpecifiedMinMax off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
EnhancedBackFolding off
StrengthReduction off
ExpressionFolding on
BooleansAsBitfields off
BitfieldContainerType "uint_T"
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs "Structure reference"
ExpressionDepthLimit 128
FoldNonRolledExpr on
LocalBlockOutputs on
RollThreshold 5
SystemCodeInlineAuto off
StateBitsets off
DataBitsets off
ActiveStateOutputEnumStorageType "Native Integer"
UseTempVars off
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero off
NoFixptDivByZeroProtection off
EfficientFloat2IntCast off
EfficientMapNaN2IntZero on
OptimizeModelRefInitCode off
LifeSpan "inf"
MaxStackSize "Inherit from target"
BufferReusableBoundary on
SimCompilerOptimization "Off"
AccelVerboseBuild off
ParallelExecutionInRapidAccelerator on
}
Simulink.DebuggingCC {
$ObjectID 12
Version "1.13.1"
RTPrefix "error"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
SignalInfNanChecking "none"
SignalRangeChecking "none"
ReadBeforeWriteMsg "UseLocalSettings"
WriteAfterWriteMsg "UseLocalSettings"
WriteAfterReadMsg "UseLocalSettings"
AlgebraicLoopMsg "warning"
ArtificialAlgebraicLoopMsg "warning"
SaveWithDisabledLinksMsg "warning"
SaveWithParameterizedLinksMsg "warning"
CheckSSInitialOutputMsg on
UnderspecifiedInitializationDetection "Classic"
MergeDetectMultiDrivingBlocksExec "none"
CheckExecutionContextPreStartOutputMsg off
CheckExecutionContextRuntimeOutputMsg off
SignalResolutionControl "UseLocalSettings"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
TimeAdjustmentMsg "none"
MaxConsecutiveZCsMsg "error"
MaskedZcDiagnostic "warning"
IgnoredZcDiagnostic "warning"
SolverPrmCheckMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskDSMMsg "error"
MultiTaskCondExecSysMsg "error"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
TasksWithSamePriorityMsg "warning"
SigSpecEnsureSampleTimeMsg "warning"
CheckMatrixSingularityMsg "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterUnderflowMsg "none"
ParameterPrecisionLossMsg "warning"
ParameterTunabilityLossMsg "warning"
FixptConstUnderflowMsg "none"
FixptConstOverflowMsg "none"
FixptConstPrecisionLossMsg "none"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
FcnCallInpInsideContextMsg "EnableAllAsError"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SFcnCompatibilityMsg "none"
FrameProcessingCompatibilityMsg "warning"
UniqueDataStoreMsg "none"
BusObjectLabelMismatch "warning"
RootOutportRequireBusObject "warning"
AssertControl "UseLocalSettings"
EnableOverflowDetection off
ModelReferenceIOMsg "none"
ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"
ModelReferenceVersionMismatchMessage "none"
ModelReferenceIOMismatchMessage "none"
ModelReferenceCSMismatchMessage "none"
UnknownTsInhSupMsg "warning"
ModelReferenceDataLoggingMessage "warning"
ModelReferenceSymbolNameMessage "warning"
ModelReferenceExtraNoncontSigs "error"
StateNameClashWarn "none"
SimStateInterfaceChecksumMismatchMsg "warning"
SimStateOlderReleaseMsg "error"
InitInArrayFormatMsg "warning"
StrictBusMsg "ErrorLevel1"
BusNameAdapt "WarnAndRepair"
NonBusSignalsTreatedAsBus "none"
LoggingUnavailableSignals "error"
BlockIODiagnostic "none"
SFUnusedDataAndEventsDiag "warning"
SFUnexpectedBacktrackingDiag "warning"
SFInvalidInputDataAccessInChartInitDiag "warning"
SFNoUnconditionalDefaultTransitionDiag "warning"
SFTransitionOutsideNaturalParentDiag "warning"
SFUnconditionalTransitionShadowingDiag "warning"
SFUndirectedBroadcastEventsDiag "warning"
SFTransitionActionBeforeConditionDiag "warning"
}
Simulink.HardwareCC {
$ObjectID 13
Version "1.13.1"
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
ProdBitPerLongLong 64
ProdBitPerFloat 32
ProdBitPerDouble 64
ProdBitPerPointer 32
ProdLargestAtomicInteger "Char"
ProdLargestAtomicFloat "None"
ProdIntDivRoundTo "Undefined"
ProdEndianess "Unspecified"
ProdWordSize 32
ProdShiftRightIntArith on
ProdLongLongMode off
ProdHWDeviceType "32-bit Generic"
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
TargetBitPerLongLong 64
TargetBitPerFloat 32
TargetBitPerDouble 64
TargetBitPerPointer 32
TargetLargestAtomicInteger "Char"
TargetLargestAtomicFloat "None"
TargetShiftRightIntArith on
TargetLongLongMode off
TargetIntDivRoundTo "Undefined"
TargetEndianess "Unspecified"
TargetWordSize 32
TargetTypeEmulationWarnSuppressLevel 0
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType "Specified"
TargetUnknown off
ProdEqTarget on
}
Simulink.ModelReferenceCC {
$ObjectID 14
Version "1.13.1"
UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
CheckModelReferenceTargetMessage "error"
EnableParallelModelReferenceBuilds off
ParallelModelReferenceErrorOnInvalidPool on
ParallelModelReferenceMATLABWorkerInit "None"
ModelReferenceNumInstancesAllowed "Multi"
PropagateVarSize "Infer from blocks in model"
ModelReferencePassRootInputsByReference on
ModelReferenceMinAlgLoopOccurrences off
PropagateSignalLabelsOutOfModel off
SupportModelReferenceSimTargetCustomCode off
}
Simulink.SFSimCC {
$ObjectID 15
Version "1.13.1"
SFSimEnableDebug on
SFSimOverflowDetection on
SFSimEcho on
SimBlas on
SimCtrlC on
SimExtrinsic on
SimIntegrity on
SimUseLocalCustomCode off
SimParseCustomCode on
SimBuildMode "sf_incremental_build"
SimGenImportedTypeDefs off
}
Simulink.RTWCC {
$BackupClass "Simulink.RTWCC"
$ObjectID 16
Version "1.13.1"
Array {
Type "Cell"
Dimension 15
Cell "IncludeHyperlinkInReport"
Cell "GenerateTraceInfo"
Cell "GenerateTraceReport"
Cell "GenerateTraceReportSl"
Cell "GenerateTraceReportSf"
Cell "GenerateTraceReportEml"
Cell "PortableWordSizes"
Cell "GenerateWebview"
Cell "GenerateCodeMetricsReport"
Cell "GenerateCodeReplacementReport"
Cell "GenerateErtSFunction"
Cell "CreateSILPILBlock"
Cell "CodeExecutionProfiling"
Cell "CodeProfilingSaveOptions"
Cell "CodeProfilingInstrumentation"
PropName "DisabledProps"
}
SystemTargetFile "grt.tlc"
TLCOptions ""
GenCodeOnly off
MakeCommand "make_rtw"
GenerateMakefile on
PackageGeneratedCodeAndArtifacts off
PackageName ""
TemplateMakefile "grt_default_tmf"
PostCodeGenCommand ""
Description ""
GenerateReport off
SaveLog off
RTWVerbose on
RetainRTWFile off
ProfileTLC off
TLCDebug off
TLCCoverage off
TLCAssert off
ProcessScriptMode "Default"
ConfigurationMode "Optimized"
ProcessScript ""
ConfigurationScript ""
ConfigAtBuild off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
CustomSourceCode ""
CustomHeaderCode ""
CustomInclude ""
CustomSource ""
CustomLibrary ""
CustomInitializer ""
CustomTerminator ""
Toolchain "Automatically locate an installed toolchain"
BuildConfiguration "Faster Builds"
IncludeHyperlinkInReport off
LaunchReport off
PortableWordSizes off
GenerateErtSFunction off
CreateSILPILBlock "None"
CodeExecutionProfiling off
CodeExecutionProfileVariable "executionProfile"
CodeProfilingSaveOptions "SummaryOnly"
CodeProfilingInstrumentation off
SILDebugging off
TargetLang "C"
IncludeBusHierarchyInRTWFileBlockHierarchyMap off
IncludeERTFirstTime off
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml off
GenerateCodeInfo off
GenerateWebview off
GenerateCodeMetricsReport off
GenerateCodeReplacementReport off
RTWCompilerOptimization "Off"
RTWCustomCompilerOptimizations ""
CheckMdlBeforeBuild "Off"
CustomRebuildMode "OnUpdate"
DataInitializer ""
SharedConstantsCachingThreshold 1024
Array {
Type "Handle"
Dimension 2
Simulink.CodeAppCC {
$ObjectID 17
Version "1.13.1"
Array {
Type "Cell"
Dimension 23
Cell "IgnoreCustomStorageClasses"
Cell "IgnoreTestpoints"
Cell "InsertBlockDesc"
Cell "InsertPolySpaceComments"
Cell "SFDataObjDesc"
Cell "MATLABFcnDesc"
Cell "SimulinkDataObjDesc"
Cell "DefineNamingRule"
Cell "SignalNamingRule"
Cell "ParamNamingRule"
Cell "InternalIdentifier"
Cell "InlinedPrmAccess"
Cell "CustomSymbolStr"
Cell "CustomSymbolStrGlobalVar"
Cell "CustomSymbolStrType"
Cell "CustomSymbolStrField"
Cell "CustomSymbolStrFcn"
Cell "CustomSymbolStrFcnArg"
Cell "CustomSymbolStrBlkIO"
Cell "CustomSymbolStrTmpVar"
Cell "CustomSymbolStrMacro"
Cell "CustomSymbolStrUtil"
Cell "ReqsInCode"
PropName "DisabledProps"
}
ForceParamTrailComments off
GenerateComments on
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
MaxIdLength 31
PreserveName off
PreserveNameWithParent off
ShowEliminatedStatement off
OperatorAnnotations off
IncAutoGenComments off
SimulinkDataObjDesc off
SFDataObjDesc off
MATLABFcnDesc off
IncDataTypeInIds off
MangleLength 1
CustomSymbolStrGlobalVar "$R$N$M"
CustomSymbolStrType "$N$R$M_T"
CustomSymbolStrField "$N$M"
CustomSymbolStrFcn "$R$N$M$F"
CustomSymbolStrFcnArg "rt$I$N$M"
CustomSymbolStrBlkIO "rtb_$N$M"
CustomSymbolStrTmpVar "$N$M"
CustomSymbolStrMacro "$R$N$M"
CustomSymbolStrUtil "$N$C"
DefineNamingRule "None"
ParamNamingRule "None"
SignalNamingRule "None"
InsertBlockDesc off
InsertPolySpaceComments off
SimulinkBlockComments on
MATLABSourceComments off
EnableCustomComments off
InternalIdentifier "Shortened"
InlinedPrmAccess "Literals"
ReqsInCode off
UseSimReservedNames off
}
Simulink.GRTTargetCC {
$BackupClass "Simulink.TargetCC"
$ObjectID 18
Version "1.13.1"
Array {
Type "Cell"
Dimension 15
Cell "GeneratePreprocessorConditionals"
Cell "IncludeMdlTerminateFcn"
Cell "CombineOutputUpdateFcns"
Cell "SuppressErrorStatus"
Cell "ERTCustomFileBanners"
Cell "GenerateSampleERTMain"
Cell "GenerateTestInterfaces"
Cell "ModelStepFunctionPrototypeControlCompliant"
Cell "CPPClassGenCompliant"
Cell "GenerateAllocFcn"
Cell "PurelyIntegerCode"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
Cell "SupportNonInlinedSFcns"
PropName "DisabledProps"
}
TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
CodeReplacementLibrary "ANSI_C"
UtilityFuncGeneration "Auto"
ERTMultiwordTypeDef "System defined"
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
ConcurrentExecutionCompliant on
IncludeMdlTerminateFcn on
GeneratePreprocessorConditionals "Disable all"
CombineOutputUpdateFcns on
CombineSignalStateStructs off
SuppressErrorStatus off
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
EnableShiftOperators on
ParenthesesLevel "Nominal"
MATLABClassNameForMDSCustomization "Simulink.SoftwareTarget.GRTCustomization"
ModelStepFunctionPrototypeControlCompliant off
CPPClassGenCompliant off
AutosarCompliant off
GRTInterface off
GenerateAllocFcn off
UseMalloc off
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
ExtModeIntrfLevel "Level1"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
RTWCAPIRootIO off
GenerateASAP2 off
}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
CurrentDlgPage "Solver"
ConfigPrmDlgPosition [ 740, 1300, 1820, 1940 ]
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 8
}
Object {
$PropName "DataTransfer"
$ObjectID 19
$ClassName "Simulink.GlobalDataTransfer"
DefaultTransitionBetweenSyncTasks "Ensure deterministic transfer (maximum delay)"
DefaultTransitionBetweenAsyncTasks "Ensure data integrity only"
DefaultTransitionBetweenContTasks "Ensure deterministic transfer (minimum delay)"
DefaultExtrapolationMethodBetweenContTasks "None"
AutoInsertRateTranBlk [0]
}
ExplicitPartitioning off
BlockDefaults {
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
BlockRotation 0
BlockMirror off
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
MaskDefaults {
SelfModifiable "off"
IconFrame "on"
IconOpaque "on"
RunInitForIconRedraw "off"
IconRotate "none"
PortRotate "default"
IconUnits "autoscale"
}
MaskParameterDefaults {
Evaluate "on"
Tunable "on"
NeverSave "off"
Internal "off"
ReadOnly "off"
Enabled "on"
Visible "on"
ToolTip "on"
}
BlockParameterDefaults {
Block {
BlockType BusSelector
OutputSignals "signal1,signal2,signal3"
OutputAsBus off
}
Block {
BlockType Constant
Value "1"
VectorParams1D on
SamplingMode "Sample based"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Inherit from 'Constant value'"
LockScale off
SampleTime "inf"
FramePeriod "inf"
PreserveConstantTs off
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
AccumDataTypeStr "Inherit: Inherit via internal rule"
OutMin "[]"
OutMax "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Terminator
}
}
System {
Name "k10519"
Location [-10, 2180, 2570, 3217]
Open on
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "125"
ReportName "simulink-default.rpt"
SIDHighWatermark "59"
Block {
BlockType Reference
Name "ADC0"
SID "17"
Tag "cdsAdc"
Description "type-GSC_16AI64SSA\ncard_num=0"
Ports [0, 1]
Position [245, 5237, 320, 5263]
ZOrder 3634
ForegroundColor "[0.901961, 0.000000, 0.000000]"
DropShadow on
AttributesFormatString "%<Description>\\n%<Tag>"
LibraryVersion "1.15"
FontSize 14
SourceBlock "cdsAdcx0/ADC0"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType BusSelector
Name "Bus\nSelector1"
SID "18"
Description "ADC Selector"
Ports [1, 3]
Position [370, 2407, 375, 8093]
ZOrder 3635
ShowName off
AttributesFormatString "%<Description>"
OutputSignals "adc_0_16,adc_0_17,adc_0_18"
Port {
PortNumber 1
Name "<adc_0_16>"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 2
Name "<adc_0_17>"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 3
Name "<adc_0_18>"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Constant
Name "Constant26"
SID "41"
Description "Minimum voltage of ADC (V)"
Position [805, 4900, 850, 4930]
ZOrder 3663
Value "-10"
}
Block {
BlockType Constant
Name "Constant4"
SID "42"
Description "positive and negative voltage"
Position [695, 4817, 730, 4843]
ZOrder 3661
Value "2"
}
Block {
BlockType Constant
Name "Constant6"
SID "43"
Description "Maximum voltage of ADC (V)"
Position [805, 4845, 850, 4875]
ZOrder 3658
Value "10"
}
Block {
BlockType Constant
Name "Constant7"
SID "44"
Description "Quantization range of 16 bit ADC."
Position [775, 4780, 820, 4810]
ZOrder 3659
Value "65536"
}
Block {
BlockType Product
Name "Divide1"
SID "51"
Ports [2, 1]
Position [855, 3347, 885, 3378]
ZOrder 3669
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide2"
SID "58"
Ports [2, 1]
Position [1475, 3357, 1505, 3388]
ZOrder 3675
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide27"
SID "45"
Ports [2, 1]
Position [975, 4797, 1005, 4828]
ZOrder 3664
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide3"
SID "19"
Ports [2, 1]
Position [1055, 5122, 1085, 5153]
ZOrder 3637
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide4"
SID "20"
Ports [2, 1]
Position [1065, 5297, 1095, 5328]
ZOrder 3640
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide6"
SID "21"
Ports [2, 1]
Position [1505, 5132, 1535, 5163]
ZOrder 3642
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Divide7"
SID "46"
Ports [2, 1]
Position [890, 4787, 920, 4818]
ZOrder 3660
Inputs "*/"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "DocBlock"
SID "49"
Ports []
Position [22, 4875, 62, 4914]
ZOrder 3667
ShowName off
LibraryVersion "1.285"
UserDataPersistent on
UserData "DataTag0"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
ContentPreviewEnabled off
DocumentType "Text"
}
Block {
BlockType Sum
Name "Sum1"
SID "22"
Ports [2, 1]
Position [840, 5120, 860, 5140]
ZOrder 3645
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum2"
SID "23"
Ports [2, 1]
Position [840, 5295, 860, 5315]
ZOrder 3647
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum22"
SID "47"
Ports [2, 1]
Position [910, 4850, 930, 4870]
ZOrder 3662
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Sum3"
SID "53"
Ports [2, 1]
Position [640, 3345, 660, 3365]
ZOrder 3672
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Terminator
Name "Terminator"
SID "33"
Position [1625, 5140, 1645, 5160]
ZOrder 3650
}
Block {
BlockType Terminator
Name "Terminator1"
SID "59"
Position [1585, 3365, 1605, 3385]
ZOrder 3676
}
Block {
BlockType Reference
Name "Yend_OPLEV1_SUM_Fil1"
SID "24"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [1125, 5303, 1195, 5327]
ZOrder 3649
BackgroundColor "[0.419608, 0.588235, 0.239216]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_SUM_MON"
SID "25"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [700, 5290, 780, 5320]
ZOrder 3639
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_SUM_OFFSET1"
SID "26"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [760, 5362, 825, 5378]
ZOrder 3648
BackgroundColor "[0.000000, 0.819608, 0.000000]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_SUM_VOLT1"
SID "27"
Tag "Test Point"
Ports [1]
Position [1355, 5240, 1395, 5260]
ZOrder 3641
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_SUM_VOLT_MON1"
SID "28"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [1220, 5300, 1300, 5330]
ZOrder 3644
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_X_Fil1"
SID "52"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [925, 3353, 995, 3377]
ZOrder 3673
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_X_MON2"
SID "54"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [495, 3340, 575, 3370]
ZOrder 3668
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_X_VOLT_MON2"
SID "56"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [1030, 3350, 1110, 3380]
ZOrder 3671
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_Y_Fil1"
SID "38"
Tag "cdsFilt"
Description "Purpose: "
" "
" \nStandard CDS IIR filter module. "
" "
" \n "
" "
" \nOperation: "
" "
" \nConsists of 10 second order section IIR filte"
"rs, plus a ramped gain stage. In FE code, also provides pre-defined test points and excitation channel inputs. T"
"he filter coefficients are defined in the LIGO system using the 'foton' tool.\n "
" "
" \nUsage: "
" "
" \nName the "
"part with the desired filter module name. "
" "
" "
Ports [1, 1]
Position [1125, 5128, 1195, 5152]
ZOrder 3655
BackgroundColor "darkGreen"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsFilt/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_Y_MON1"
SID "29"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [695, 5115, 775, 5145]
ZOrder 3636
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_Y_OFFSET1"
SID "30"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [760, 5187, 825, 5203]
ZOrder 3646
BackgroundColor "[0.000000, 0.819608, 0.000000]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_Y_OFFSET2"
SID "57"
Tag "cdsEpicsIn"
Description "Purpose: \nCreat"
"e an EPICS input channel connection to the FE realtime controls. \n "
" \nOperation: "
" \nOutputs value from an EPICS ai record. Value is floating point with a precisi"
"on of 3..\n \nUsage: "
" \nName the part with the desired EPICS "
"channel name. "
Ports [0, 1]
Position [565, 3412, 630, 3428]
ZOrder 3674
BackgroundColor "[0.000000, 0.819608, 0.000000]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.2"
SourceBlock "cdsEpicsIn/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_Y_VOLT1"
SID "31"
Tag "Test Point"
Ports [1]
Position [1385, 5065, 1425, 5085]
ZOrder 3638
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_Y_VOLT2"
SID "55"
Tag "Test Point"
Ports [1]
Position [1185, 3290, 1225, 3310]
ZOrder 3670
BackgroundColor "[0.000000, 0.819608, 0.000000]"
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsTP/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "Yend_OPLEV1_Y_VOLT_MON1"
SID "32"
Tag "cdsEpicsOutput"
Description "Purpose: \nOutput a FE signal to an EPICS channel. "
" \n \nOperation: "
" \nTakes input value and passes it to EPICS record. \n \nUsage"
": \nName the part with the desired EPICS rrecord name."
Ports [1, 1]
Position [1230, 5125, 1310, 5155]
ZOrder 3643
BackgroundColor "[0.686275, 0.372549, 0.313725]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.1"
SourceBlock "cdsEpicsOut/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Block {
BlockType Reference
Name "host=standalone\nsite=K1\nrate=16K\ndcuid=96\nshmem_daq=1\nspecific_cpu=4\nadcSlave=1\nno_rfm_dma=1"
SID "50"
Tag "cdsParameters"
Description "SCRIPT=activateDQ.py "
" "
" \n "
" "
" \nPurpose: "
" "
" \n "
" "
" \nProvide system parameters to the FE code generator to"
" properly configure the generated EPICS names, rep rate of the FE controller, and the Data Acquisition node ID f"
"or proper storage of data from this FE controller. \n "
" "
" \nUseage: "
" "
" \n "
" "
" \nThe part NAME"
" field is used to identify the FE parameters. It must be of the form: "
" \n "
" "
" "
" \nsite= "
" "
" \nrate= "
" "
" \ndcuid= "
" "
" \n "
" "
" \nWhere: "
" "
" \n "
" "
" \nsite= argument may be H1, H2, L1, M1, G1, eit"
"her as a single argument or multiple, for example site=H1,H2. These are the only names allowed. These will becom"
"e the first two characters of all EPICS and signal names (for example G1:).\n "
" "
" \nrate= may be 2K, 16K, 32K"
", or 64K "
" \n "
" "
" \ndcuid"
"= is site specific ie it must be unique at each site. "
" "
" "
Ports [1, 1]
Position [20, 4945, 60, 5005]
ZOrder 3666
BackgroundColor "[1.000000, 0.501961, 0.000000]"
DropShadow on
AttributesFormatString "%<Tag>"
LibraryVersion "1.4"
SourceBlock "cdsParameters/Subsystem"
SourceType "SubSystem"
ContentPreviewEnabled off
}
Line {
ZOrder 47
SrcBlock "ADC0"
SrcPort 1
DstBlock "Bus\nSelector1"
DstPort 1
}
Line {
Name "<adc_0_17>"
ZOrder 48
Labels [0, 0]
SrcBlock "Bus\nSelector1"
SrcPort 2
Points [157, 0; 0, -120]
DstBlock "Yend_OPLEV1_Y_MON1"
DstPort 1
}
Line {
ZOrder 49
SrcBlock "Divide3"
SrcPort 1
DstBlock "Yend_OPLEV1_Y_Fil1"
DstPort 1
}
Line {
ZOrder 50
SrcBlock "Yend_OPLEV1_SUM_Fil1"
SrcPort 1
DstBlock "Yend_OPLEV1_SUM_VOLT_MON1"
DstPort 1
}
Line {
ZOrder 52
SrcBlock "Sum2"
SrcPort 1
DstBlock "Divide4"
DstPort 1
}
Line {
ZOrder 55
SrcBlock "Yend_OPLEV1_Y_VOLT_MON1"
SrcPort 1
Points [27, 0]
Branch {
ZOrder 147
Points [0, -65]
DstBlock "Yend_OPLEV1_Y_VOLT1"
DstPort 1
}
Branch {
ZOrder 53
DstBlock "Divide6"
DstPort 1
}
}
Line {
Name "<adc_0_18>"
ZOrder 56
Labels [0, 0]
SrcBlock "Bus\nSelector1"
SrcPort 3
Points [150, 0; 0, -1840]
DstBlock "Yend_OPLEV1_SUM_MON"
DstPort 1
}
Line {
ZOrder 87
SrcBlock "Sum1"
SrcPort 1
DstBlock "Divide3"
DstPort 1
}
Line {
ZOrder 88
SrcBlock "Yend_OPLEV1_Y_OFFSET1"
SrcPort 1
Points [20, 0]
DstBlock "Sum1"
DstPort 2
}
Line {
ZOrder 89
SrcBlock "Yend_OPLEV1_SUM_OFFSET1"
SrcPort 1
Points [20, 0]
DstBlock "Sum2"
DstPort 2
}
Line {
ZOrder 90
SrcBlock "Yend_OPLEV1_Y_MON1"
SrcPort 1
DstBlock "Sum1"
DstPort 1
}
Line {
ZOrder 91
SrcBlock "Yend_OPLEV1_SUM_MON"
SrcPort 1
DstBlock "Sum2"
DstPort 1
}
Line {
ZOrder 92
SrcBlock "Divide4"
SrcPort 1
DstBlock "Yend_OPLEV1_SUM_Fil1"
DstPort 1
}
Line {
ZOrder 93
SrcBlock "Divide6"
SrcPort 1
DstBlock "Terminator"
DstPort 1
}
Line {
ZOrder 102
SrcBlock "Yend_OPLEV1_Y_Fil1"
SrcPort 1
DstBlock "Yend_OPLEV1_Y_VOLT_MON1"
DstPort 1
}
Line {
ZOrder 103
SrcBlock "Constant4"
SrcPort 1
Points [126, 0; 0, -20]
DstBlock "Divide7"
DstPort 2
}
Line {
ZOrder 104
SrcBlock "Sum22"
SrcPort 1
Points [17, 0; 0, -40]
DstBlock "Divide27"
DstPort 2
}
Line {
ZOrder 105
SrcBlock "Constant7"
SrcPort 1
DstBlock "Divide7"
DstPort 1
}
Line {
ZOrder 106
SrcBlock "Constant6"
SrcPort 1
DstBlock "Sum22"
DstPort 1
}
Line {
ZOrder 107
SrcBlock "Constant26"
SrcPort 1
Points [65, 0]
DstBlock "Sum22"
DstPort 2
}
Line {
ZOrder 108
SrcBlock "Divide7"
SrcPort 1
DstBlock "Divide27"
DstPort 1
}
Line {
ZOrder 154
SrcBlock "Divide1"
SrcPort 1
DstBlock "Yend_OPLEV1_X_Fil1"
DstPort 1
}
Line {
ZOrder 157
SrcBlock "Yend_OPLEV1_X_VOLT_MON2"
SrcPort 1
Points [20, 0]
Branch {
ZOrder 175
Points [0, -65]
DstBlock "Yend_OPLEV1_Y_VOLT2"
DstPort 1
}
Branch {
ZOrder 174
DstBlock "Divide2"
DstPort 1
}
}
Line {
ZOrder 158
SrcBlock "Sum3"
SrcPort 1
DstBlock "Divide1"
DstPort 1
}
Line {
ZOrder 160
SrcBlock "Yend_OPLEV1_X_MON2"
SrcPort 1
DstBlock "Sum3"
DstPort 1
}
Line {
ZOrder 161
SrcBlock "Yend_OPLEV1_X_Fil1"
SrcPort 1
DstBlock "Yend_OPLEV1_X_VOLT_MON2"
DstPort 1
}
Line {
Name "<adc_0_16>"
ZOrder 167
Labels [0, 0]
SrcBlock "Bus\nSelector1"
SrcPort 1
DstBlock "Yend_OPLEV1_X_MON2"
DstPort 1
}
Line {
ZOrder 169
SrcBlock "Yend_OPLEV1_Y_OFFSET2"
SrcPort 1
Points [15, 0]
DstBlock "Sum3"
DstPort 2
}
Line {
ZOrder 172
SrcBlock "Divide2"
SrcPort 1
DstBlock "Terminator1"
DstPort 1
}
Line {
ZOrder 61
SrcBlock "Yend_OPLEV1_SUM_VOLT_MON1"
SrcPort 1
Points [15, 0]
Branch {
ZOrder 60
Points [152, 0; 0, -160]
Branch {
ZOrder 180
DstBlock "Divide6"
DstPort 2
}
Branch {
ZOrder 178
Points [0, -907; -17, 0; 0, -868]
DstBlock "Divide2"
DstPort 2
}
}
Branch {
ZOrder 57
Points [0, -65]
DstBlock "Yend_OPLEV1_SUM_VOLT1"
DstPort 1
}
}
Line {
ZOrder 145
SrcBlock "Divide27"
SrcPort 1
Points [9, 0]
Branch {
ZOrder 190
Points [0, 330]
Branch {
ZOrder 181
Points [-6, 0; 0, 175]
DstBlock "Divide4"
DstPort 2
}
Branch {
ZOrder 151
DstBlock "Divide3"
DstPort 2
}
}
Branch {
ZOrder 189
Points [0, -160; -223, 0; 0, -1285]
DstBlock "Divide1"
DstPort 2
}
}
}
}
MatData {
NumRecords 1
DataRecord {
Tag DataTag0
Data " %)30 . \\ $ 8 ( @ % \" $ ! 0 % 0 \" $ 8 =F5R"
"<VEO;@!C;VYT96YT &9O<FUA= #@ #@ & \" 8 !0 @ ! 0 $ \"0 @ S,S,S,S/S"
"/PX @ 0 !@ @ $ 4 ( 0 .D ! ! #I 4T-9(\"T@4W5S<&5N<VEO;B!#;VYT<F]L;&5R("
"%D@16YD\"E1H:7,@8V]N=')O;',@=&AE('-U<W!E;G-I;VX@9F]R('1H92!9($5N9\"!497-T($UA<W,@*$5435DI\"D-H86YN96QS(&9O<B!T:&ES"
"(&%R92!3251%.E-54RU%5$U9+5A86%@*5&AI<R!T86QK<R!T;R!T:&4@3%-#+FUD;\" H3&5N9W1H(%-E;G-I;F<@86YD($-O;G1R;VPI(&%S('=E;"
"&P@87,@4U!9+FUD;\" H4W5S<&5N<VEO;B!0;&%N=\"!9($5N9\"D #@ # & \" 0 !0 @ ! P "
" $ $ # %185 "
}
}
simulink_archive/simLink/k1aai.mdl 0 → 100644
View file @ 81d2c40c
This source diff could not be displayed because it is too large. You can view the blob instead.
simulink_archive/simLink/k1aai_tsuchida.mdl 0 → 100644
View file @ 81d2c40c
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