Library { Name "OSEM_WD" Version 7.5 MdlSubVersion 0 SavedCharacterEncoding "US-ASCII" LibraryType "BlockLibrary" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off MaxMDLFileLineLength 120 Created "Wed Mar 7 14:52:08 2012" Creator "controls" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "controls" ModifiedDateFormat "%" LastModifiedDate "Wed Mar 14 16:56:22 2012" RTWModifiedTimeStamp 253644974 ModelVersionFormat "1.%" ConfigurationManager "none" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" RecordCoverage off CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on CovForceBlockReductionOff on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.10.0" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 2 Version "1.10.0" StartTime "0.0" StopTime "10.0" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "ode45" SolverName "ode45" SolverJacobianMethodControl "auto" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 3 Version "1.10.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on DSMLogging on InspectSignalLogs off SaveTime on ReturnWorkspaceOutputs off StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" DSMLoggingName "dsmout" OutputOption "RefineOutputTimes" OutputTimes "[]" ReturnWorkspaceOutputsName "out" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.10.0" Array { Type "Cell" Dimension 7 Cell "BooleansAsBitfields" Cell "PassReuseOutputArgsAs" Cell "PassReuseOutputArgsThreshold" Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off UseIntDivNetSlope off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off EnforceIntegerDowncast on ExpressionFolding on BooleansAsBitfields off BitfieldContainerType "uint_T" EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero off NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" MaxStackSize "Inherit from target" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off } Simulink.DebuggingCC { $ObjectID 5 Version "1.10.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "warning" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" FixptConstUnderflowMsg "none" FixptConstOverflowMsg "none" FixptConstPrecisionLossMsg "none" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" SimStateInterfaceChecksumMismatchMsg "warning" StrictBusMsg "ErrorLevel1" BusNameAdapt "WarnAndRepair" NonBusSignalsTreatedAsBus "none" LoggingUnavailableSignals "error" BlockIODiagnostic "none" } Simulink.HardwareCC { $ObjectID 6 Version "1.10.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.10.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" EnableParallelModelReferenceBuilds off ParallelModelReferenceMATLABWorkerInit "None" ModelReferenceNumInstancesAllowed "Multi" PropagateVarSize "Infer from blocks in model" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off PropagateSignalLabelsOutOfModel off SupportModelReferenceSimTargetCustomCode off } Simulink.SFSimCC { $ObjectID 8 Version "1.10.0" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimCtrlC on SimExtrinsic on SimIntegrity on SimUseLocalCustomCode off SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 9 Version "1.10.0" Array { Type "Cell" Dimension 6 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" CustomRebuildMode "OnUpdate" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 10 Version "1.10.0" Array { Type "Cell" Dimension 19 Cell "IgnoreCustomStorageClasses" Cell "IgnoreTestpoints" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrFcnArg" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" Cell "ReqsInCode" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrFcnArg "rt$I$N$M" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 11 Version "1.10.0" Array { Type "Cell" Dimension 17 Cell "GeneratePreprocessorConditionals" Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" ERTCodeCoverageTool "None" ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on GeneratePreprocessorConditionals "Disable all" CombineOutputUpdateFcns off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on SupportVariableSizeSignals off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" ConfigPrmDlgPosition " [ 2120, 405, 3000, 1035 ] " } PropName "ConfigurationSets" } BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "fixdt(1,16,0)" ConRadixGroup "Use specified scaling" OutScaling "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" LockScale off SampleTime "inf" FramePeriod "inf" PreserveConstantTs off } Block { BlockType Demux Outputs "4" DisplayOption "none" BusSelectionMode off } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" LockScale off SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchInputForFeedbackSignals off Interpolate on } Block { BlockType Logic Operator "AND" Inputs "2" IconShape "rectangular" AllPortsSameDT on OutDataTypeMode "Logical (see Configuration Parameters: Optimization)" LogicDataType "uint(8)" OutDataTypeStr "Inherit: Logical (see Configuration Parameters: Optimization)" SampleTime "-1" } Block { BlockType Mux Inputs "4" DisplayOption "none" UseBusObject off BusObject "BusObject" NonVirtualBus off } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" LockScale off SignalType "auto" SamplingMode "auto" SourceOfInitialOutputValue "Dialog" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType RelationalOperator Operator ">=" InputSameDT on LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimization)" LogicDataType "uint(8)" OutDataTypeStr "Inherit: Logical (see Configuration Parameters: Optimization)" ZeroCross on SampleTime "-1" } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } } System { Name "OSEM_WD" Location [2814, 682, 3394, 942] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" ReportName "simulink-default.rpt" SIDHighWatermark 59 Block { BlockType SubSystem Name "OSEM_WD" SID 1 Ports [2, 1] Position [100, 43, 270, 112] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "OSEM_WD" Location [167, 273, 1930, 1279] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "OSEM_IN" SID 2 Position [30, 228, 60, 242] IconDisplay "Port number" } Block { BlockType Inport Name "RESET_IN" SID 57 Position [30, 323, 60, 337] ForegroundColor "red" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "100MHZHP" SID 25 Tag "cdsFunctionCall" Description "inline FILTER100MHZHP $RCG_DIR/src/drv/susWatchdogFilters.c" Ports [1, 1] Position [315, 415, 355, 475] AttributesFormatString "%" LibraryVersion "1.3" SourceBlock "cdsFunctionCall/Subsystem" SourceType "SubSystem" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" } Block { BlockType Reference Name "10MHZLP" SID 19 Tag "cdsFunctionCall" Description "inline FILTER10MHZLP $RCG_DIR/src/drv/susWatchdogFilters.c" Ports [1, 1] Position [325, 270, 365, 330] AttributesFormatString "%" LibraryVersion "1.3" SourceBlock "cdsFunctionCall/Subsystem" SourceType "SubSystem" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" } Block { BlockType Reference Name "10MHZLP1" SID 22 Tag "cdsFunctionCall" Description "inline FILTER10MHZLP $RCG_DIR/src/drv/susWatchdogFilters.c" Ports [1, 1] Position [570, 365, 610, 425] AttributesFormatString "%" LibraryVersion "1.3" SourceBlock "cdsFunctionCall/Subsystem" SourceType "SubSystem" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" } Block { BlockType Constant Name "Constant" SID 52 Position [620, 244, 665, 276] Value "10000" } Block { BlockType Constant Name "Constant1" SID 53 Position [650, 309, 700, 341] Value "-10000" } Block { BlockType Constant Name "Constant2" SID 54 Position [835, 410, 865, 440] Value "15000" } Block { BlockType Constant Name "Constant3" SID 59 Position [115, 269, 175, 301] Value "-12000" } Block { BlockType Demux Name "Demux" SID 20 Ports [1, 1] Position [385, 246, 390, 354] BackgroundColor "black" ShowName off Outputs "1" DisplayOption "bar" } Block { BlockType Demux Name "Demux1" SID 23 Ports [1, 1] Position [630, 341, 635, 449] BackgroundColor "black" ShowName off Outputs "1" DisplayOption "bar" } Block { BlockType Demux Name "Demux2" SID 26 Ports [1, 1] Position [375, 381, 380, 509] BackgroundColor "black" ShowName off Outputs "1" DisplayOption "bar" } Block { BlockType Reference Name "LPOUT" SID 56 Tag "cdsEpicsOutput" Description "Purpose: \nOutput a FE signal to an EPICS channel. " " \n \nOperation: \nTakes " "input value and passes it to EPICS record. \n \nUsage: " " \nName the part with the desired EPICS rrecord name." Ports [1, 1] Position [425, 180, 505, 210] BackgroundColor "[0.686275, 0.372549, 0.313725]" DropShadow on AttributesFormatString "%" LibraryVersion "1.1" SourceBlock "cdsEpicsOut/Subsystem" SourceType "SubSystem" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" } Block { BlockType Logic Name "LogicalOperator" SID 15 Ports [2, 1] Position [830, 197, 860, 228] AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "LogicalOperator1" SID 16 Ports [2, 1] Position [995, 302, 1025, 333] AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Mux Name "Mux" SID 21 Ports [2, 1] Position [295, 245, 300, 360] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType Mux Name "Mux1" SID 24 Ports [2, 1] Position [540, 340, 545, 455] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType Mux Name "Mux2" SID 27 Ports [2, 1] Position [285, 386, 290, 504] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType RelationalOperator Name "Operator" SID 46 Ports [2, 1] Position [710, 187, 740, 218] Operator "<" InputSameDT off LogicOutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType RelationalOperator Name "Operator1" SID 48 Ports [2, 1] Position [745, 292, 775, 323] Operator ">" InputSameDT off LogicOutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType RelationalOperator Name "Operator2" SID 51 Ports [2, 1] Position [905, 377, 935, 408] Operator "<" InputSameDT off LogicOutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Reference Name "RMSOUT" SID 55 Tag "cdsEpicsOutput" Description "Purpose: \nOutput a FE signal to an EPICS channel. " " \n \nOperation: \nTakes " "input value and passes it to EPICS record. \n \nUsage: " " \nName the part with the desired EPICS rrecord name." Ports [1, 1] Position [685, 370, 765, 400] BackgroundColor "[0.686275, 0.372549, 0.313725]" DropShadow on AttributesFormatString "%" LibraryVersion "1.1" SourceBlock "cdsEpicsOut/Subsystem" SourceType "SubSystem" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" } Block { BlockType Sum Name "Sum" SID 58 Ports [2, 1] Position [210, 225, 230, 245] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "TrueRMS" SID 17 Tag "cdsTrueRMS" Description "window_size=655360" Ports [1, 1] Position [410, 371, 495, 419] BackgroundColor "[0.462745, 0.721569, 0.337255]" DropShadow on AttributesFormatString "%\\n%" LibraryVersion "1.7" SourceBlock "cdsTrueRMS/TrueRMS" SourceType "SubSystem" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" } Block { BlockType Outport Name "WD" SID 18 Position [1090, 313, 1120, 327] IconDisplay "Port number" } Line { SrcBlock "LogicalOperator1" SrcPort 1 DstBlock "WD" DstPort 1 } Line { SrcBlock "Operator2" SrcPort 1 Points [15, 0; 0, -70] DstBlock "LogicalOperator1" DstPort 2 } Line { SrcBlock "LogicalOperator" SrcPort 1 Points [60, 0; 0, 95] DstBlock "LogicalOperator1" DstPort 1 } Line { SrcBlock "Operator1" SrcPort 1 Points [35, 0] DstBlock "LogicalOperator" DstPort 2 } Line { SrcBlock "Operator" SrcPort 1 DstBlock "LogicalOperator" DstPort 1 } Line { SrcBlock "Demux" SrcPort 1 Points [15, 0] DstBlock "LPOUT" DstPort 1 } Line { SrcBlock "TrueRMS" SrcPort 1 Points [25, 0] DstBlock "Mux1" DstPort 1 } Line { SrcBlock "10MHZLP" SrcPort 1 DstBlock "Demux" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [0, -5] DstBlock "10MHZLP" DstPort 1 } Line { SrcBlock "10MHZLP1" SrcPort 1 DstBlock "Demux1" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [5, 0] DstBlock "10MHZLP1" DstPort 1 } Line { SrcBlock "Demux1" SrcPort 1 Points [30, 0] DstBlock "RMSOUT" DstPort 1 } Line { SrcBlock "100MHZHP" SrcPort 1 DstBlock "Demux2" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "100MHZHP" DstPort 1 } Line { SrcBlock "Demux2" SrcPort 1 Points [5, 0; 0, -50] DstBlock "TrueRMS" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [15, 0; 0, -50] DstBlock "Operator" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [20, 0] DstBlock "Operator2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 Points [10, 0; 0, -10] DstBlock "Operator1" DstPort 2 } Line { SrcBlock "RMSOUT" SrcPort 1 DstBlock "Operator2" DstPort 1 } Line { SrcBlock "LPOUT" SrcPort 1 Points [25, 0] Branch { DstBlock "Operator" DstPort 1 } Branch { Points [0, 105] DstBlock "Operator1" DstPort 1 } } Line { SrcBlock "RESET_IN" SrcPort 1 Points [175, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, 145] Branch { Points [0, 0] DstBlock "Mux2" DstPort 2 } Branch { Points [0, 55; 285, 0] DstBlock "Mux1" DstPort 2 } } } Line { SrcBlock "Sum" SrcPort 1 Points [15, 0; 0, 40] DstBlock "Mux" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 Points [40, 0] DstBlock "Sum" DstPort 2 } Line { SrcBlock "OSEM_IN" SrcPort 1 Points [15, 0] Branch { DstBlock "Sum" DstPort 1 } Branch { Points [0, 180] DstBlock "Mux2" DstPort 1 } } Annotation { Name "Outputs 1 when DAC enabled\nOutputs 0 when DAC disabled" Position [785, 159] FontName "*" FontSize 18 } } } } }